Patent classifications
C30B29/26
EPITAXIAL OXIDE MATERIALS, STRUCTURES, AND DEVICES
A transistor can include a substrate, an epitaxial oxide layer on the substrate, and a gate layer. The substrate can include a first crystalline material. The epitaxial oxide layer can include a second oxide material including: Li and one of Ni, Al, Ga, Mg, Zn and Ge; or Ni and one of Li, Al, Ga, Mg, Zn and Ge; or Mg and one of Ni, Al, Ga, and Ge; or Zn and one of Ni, Al, Ga, and Ge. The gate layer can include a third oxide material. A bandgap of the third oxide material of the gate can be wider than a bandgap of the second oxide material of the epitaxial oxide layer. The transistor can also include a source electrical contact coupled to the epitaxial oxide layer, a drain electrical contact coupled to the epitaxial oxide layer, and a first gate electrical contact coupled to the gate layer.
CONTROLLED SURFACE CHEMISTRY FOR POLYTYPIC AND MICROSTRUCTURAL SELECTIVE GROWTH ON HEXAGONAL SiC SUBSTRATES
A high-throughput method for identifying single crystal hexagonal-SiC off-axis surfaces that support surface chemistries and kinetics to selectively produce various epitaxial growth modes of the metastable 3C-SiC polytype is provided. In execution of the aforementioned method, the present invention also encompasses the use of a single crystal hexagonal-SiC domed substrate, and a method for manufacturing thereof. Said method for screening silicon carbide growth surfaces is comprised of: fabrication of a silicon carbide domed substrate; forming a step-terrace growth surface on the domed surface of said silicon carbide domed substrate by hydrogen etching; performing silicon carbide deposition upon said growth surface, thereby creating an silicon carbide epitaxial domed wafer; and characterization of said silicon carbide epitaxial domed wafer. Silicon carbide deposition upon a silicon carbide domed growth surface allows for the modulation of the supersaturation ratio under a single set of growth conditions. There is provided a method to select a specific off-cut angle and orientation for a silicon carbide substrate that can be used to selectively and homogeneously grow a targeted 3C-silicon carbide microstructure best suited for the intended application.
CONTROLLED SURFACE CHEMISTRY FOR POLYTYPIC AND MICROSTRUCTURAL SELECTIVE GROWTH ON HEXAGONAL SiC SUBSTRATES
A high-throughput method for identifying single crystal hexagonal-SiC off-axis surfaces that support surface chemistries and kinetics to selectively produce various epitaxial growth modes of the metastable 3C-SiC polytype is provided. In execution of the aforementioned method, the present invention also encompasses the use of a single crystal hexagonal-SiC domed substrate, and a method for manufacturing thereof. Said method for screening silicon carbide growth surfaces is comprised of: fabrication of a silicon carbide domed substrate; forming a step-terrace growth surface on the domed surface of said silicon carbide domed substrate by hydrogen etching; performing silicon carbide deposition upon said growth surface, thereby creating an silicon carbide epitaxial domed wafer; and characterization of said silicon carbide epitaxial domed wafer. Silicon carbide deposition upon a silicon carbide domed growth surface allows for the modulation of the supersaturation ratio under a single set of growth conditions. There is provided a method to select a specific off-cut angle and orientation for a silicon carbide substrate that can be used to selectively and homogeneously grow a targeted 3C-silicon carbide microstructure best suited for the intended application.
TRANSPARENT CERAMIC WITH COMPLEX GEOMETRY
A ceramic product includes a transparent ceramic panel having a non-planar geometry including a bend having a slippage plane, an increased haze, a non-uniform thickness, or a combination thereof. A method includes providing a transparent ceramic panel, heating the panel, bending the panel to conform to a non-planar geometry.
Direct Upcycling of Lithium-ion Battery Cathodes to Single-Crystal Nickel-rich NCMs
The present disclosure relates to methods for upcycling of spent lithium-ion battery cathodes. In some embodiments, the methods may include admixing delithiated NCM particles with a supplementary lithium source comprising a single lithium salt to produce single-crystal NCM particles with effective size control and improved electrochemical performance compared to pristine polycrystalline NCM.
Direct Upcycling of Lithium-ion Battery Cathodes to Single-Crystal Nickel-rich NCMs
The present disclosure relates to methods for upcycling of spent lithium-ion battery cathodes. In some embodiments, the methods may include admixing delithiated NCM particles with a supplementary lithium source comprising a single lithium salt to produce single-crystal NCM particles with effective size control and improved electrochemical performance compared to pristine polycrystalline NCM.
P-TYPE SPINEL STRUCTURES AS A P-N HETEROEPITAXIAL INTERFACE TO B-GA2O3
Spinel and gallium oxide (Ga.sub.2O.sub.3) p-n heteroepitaxial interfaces and methods of making the same are presented. In embodiments, a method of manufacturing spinel structures includes depositing, via off-axis sputtering, an epitaxial layer of p-type spinel on a gallium oxide (Ga.sub.2O.sub.3) substrate, thereby creating a p-n heteroepitaxial interface between the p-type spinel and the Ga.sub.2O.sub.3 substrate. In implementations, a semiconductor device includes a Ga.sub.2O.sub.3 substrate; a p-type spinel epitaxial layer formed directly on a surface of the Ga.sub.2O.sub.3 substrate, thereby forming a p-n heteroepitaxial interface; and electrodes.
P-TYPE SPINEL STRUCTURES AS A P-N HETEROEPITAXIAL INTERFACE TO B-GA2O3
Spinel and gallium oxide (Ga.sub.2O.sub.3) p-n heteroepitaxial interfaces and methods of making the same are presented. In embodiments, a method of manufacturing spinel structures includes depositing, via off-axis sputtering, an epitaxial layer of p-type spinel on a gallium oxide (Ga.sub.2O.sub.3) substrate, thereby creating a p-n heteroepitaxial interface between the p-type spinel and the Ga.sub.2O.sub.3 substrate. In implementations, a semiconductor device includes a Ga.sub.2O.sub.3 substrate; a p-type spinel epitaxial layer formed directly on a surface of the Ga.sub.2O.sub.3 substrate, thereby forming a p-n heteroepitaxial interface; and electrodes.
Epitaxial Oxide Integrated Circuit
The present disclosure provides techniques for epitaxial oxide materials, structures and devices. In some embodiments, an integrated circuit includes a field effect transistor (FET) and a waveguide coupled to the FET, wherein the waveguide comprises a signal conductor. The FET can include: a substrate; an epitaxial semiconductor layer on the substrate, the epitaxial semiconductor layer comprising a second oxide material with a first bandgap; a gate layer on the epitaxial semiconductor layer, the gate layer comprising a gate oxide material with a second bandgap, wherein the second bandgap is wider than the first bandgap; and electrical contacts. The electrical contacts can include: a source electrical contact coupled to the epitaxial semiconductor layer; a drain electrical contact coupled to the epitaxial semiconductor layer; and a first gate electrical contact coupled to the gate layer.
SINGLE-CRYSTAL CATHODE MATERIAL AND PREPARING METHOD THEREOF
A single-crystal cathode material and preparing method thereof are provided. The method involves mixing and ball milling a lithium source with a nickel-cobalt-manganese precursor and then performing a first sintering treatment to obtain the first main material. The first sintering temperature is 650 to 950 C. and sintering time is 15 to 30 hours. The first main material is then mixed and ball-milled with source A and performing a second sintering treatment to prepare the single-crystal cathode material. The second sintering temperature is 650-950 C. and sintering time is 5-15 hours. A precursor is used to directly prepare a single-crystal cathode material without jet milling.