A multi-component coating composition for a surface of a semiconductor process chamber component comprising at least one first film layer of a yttrium oxide or a yttrium fluoride coated onto the surface of the semiconductor process chamber component using an atomic layer deposition process and at least one second film layer of an additional oxide or an additional fluoride coated onto the surface of the semiconductor process chamber component using an atomic layer deposition process, wherein the multi-component coating composition is selected from the group consisting of YO.sub.xF.sub.y, YAl.sub.xO.sub.y, YZr.sub.xO.sub.y and YZr.sub.xAl.sub.yO.sub.z.

A method of manufacturing a semiconductor device includes: forming an amorphous metal film on a substrate by time-divisionally conducting a cycle a predetermined number of times, the cycle including: (a) simultaneously supplying a metal-containing gas and a first reducing gas to the substrate to form a first amorphous metal layer on the substrate, and (b) forming a second amorphous metal layer on the first amorphous metal layer by time-divisionally supplying, a predetermined number of times, the metal-containing gas and a second reducing gas to the substrate on which the first amorphous metal layer is formed; and forming a crystallized metal layer on the substrate by simultaneously supplying the metal-containing gas and the first reducing gas to the substrate on which the amorphous metal film is formed.

Methods for forming a laminate film on substrate by a plasma-enhanced cyclical deposition process are provided. The methods may include: providing a substrate into a reaction chamber, and depositing on substrate a metal oxide laminate film by alternatingly depositing a first metal oxide film and a second metal oxide film different from the first metal oxide film, wherein depositing the first metal oxide film and the second metal oxide film comprises, contacting the substrate with sequential and alternating pulses of a metal precursor and an oxygen reactive species generated by applying RF power to a reactant gas comprising at least nitrous oxide (N.sub.2O).

The disclosure relates to methods of depositing an etch-stop layer on a patterned hard mask is disclosed. The method comprises providing a substrate comprising the patterned hard mask in a reaction chamber, selectively depositing passivation material on the first material; and selectively depositing an etch-stop layer on the on the second material. The patterned hard mask comprises a first material and a second material, and the second material forms partially the surface of the substrate. The disclosure further relates to a semiconductor structure, to a device and to a deposition assembly.

Described are low resistivity metal layers/films, such as low resistivity ruthenium (Ru) layers/films, and methods of forming low resistivity metal films. Ru layers/films with close-to-bulk resistivity can be prepared on substrates using Ru(CpEt).sub.2 + O.sub.2 ALD, as well as a two-step ALD process using Ru(DMBD)(CO).sub.3 + TBA (tertiary butyl amine) to nucleate the substrate and Ru(EtCp).sub.2 + O.sub.2 to increase layer/film thickness. The Ru layer/films and methods of preparing Ru layers/films described herein may be suitable for use in barrierless via-fills, as well as at M0/M1 interconnect layers.

A system and method associated with a charge drain coating are disclosed. The charge drain coating may be applied to surfaces of an electron-optical device to drain electrons that come into contact with the charge drain coating so that the performance of the electron-optical device will not be hindered by electron charge build-up. The charge drain coating may include a doping material that coalesces into clusters that are embedded within a high dielectric insulating material. The charge drain coating may be deposited onto the inner surfaces of lenslets of the electron-optical device.

A process chamber includes multiple partitions within a single continuous vacuum enclosure. Each of the multiple partitions is defined by respective distinct volumes within the single continuous vacuum enclosure that are connected thereamongst for unhindered movement of a substrate therethrough. The multiple partitions are configured to provide different process gases or purge gases to the substrate as the substrate cycles through the multiple positions. The process can cycle through a first deposition step that deposits a first material on the substrate in a first position and a second deposition step that deposits a second material on the substrate in a second position within each cycle. Alternatively or additionally, the process spaces can include at least one precursor treatment space and at least one reaction space.

A method of depositing a film is provided. In the method, one operation of a unit of film deposition process is performed by carrying a substrate into a processing chamber, by depositing a nitride film on the substrate, and by carrying the substrate out of the processing chamber after finishing depositing the nitride film on the substrate. The one operation is repeated a predetermined plurality of number of times continuously to deposit the nitride film on a plurality of substrates continuously. After that, an inside of the processing chamber is oxidized by supplying an oxidation gas into the processing chamber.

The present disclosure provides a self-aligned two-time forming method capable of preventing sidewalls from being deformed, comprises sequentially growing a first silicon nitride layer, a first silicon oxide layer, a titanium nitride layer, a second silicon oxide layer, a second silicon nitride layer and a polysilicon layer on a via layer from bottom to top; defining a pattern by using the polysilicon layer as a hard mask, and etching the second silicon nitride layer to an upper surface of the second silicon oxide layer to form a plurality of silicon nitride pattern structures from the second silicon nitride layer; forming sidewalls on sidewalls of the plurality of silicon nitride pattern structures; removing the silicon nitride pattern structures in the sidewalls; etching the silicon nitride layer and the titanium nitride layer by using the sidewalls as a hard mask to form a titanium nitride pattern structure.

Provided are a substrate for an organic electronic device (OED) and a use thereof. Provided is a substrate for a device having excellent durability by preventing interlayer delamination occurring due to internal stress in a structure in which an organic material and an inorganic material are mixed. In addition, provided is an OED having another required physical property such as excellent light extraction efficiency using the substrate, as well as the excellent durability.