A test fixture for PCB components is described herein. The test fixture comprises a shim with an aperture configured to direct RF energy from a component of a PCB, via an end of the PCB, and to a top clamp of the test fixture. The end of the PCB may correspond to a cut line of a destructive test. The test fixture also comprises the top clamp with a test port and a taper configured to direct the RF energy from the aperture to the test port. The test fixture also comprises a bottom clamp attached to the top clamp to retain the PCB between the top and bottom clamps for testing. The test fixture allows for quick mounting of the PCB and testing of the component without modifying a design of the PCB or requiring specific drilling of the PCB.

A probe apparatus and a wafer inspection method are provided. The probe apparatus includes a chuck configured to support a wafer, a track surrounding the chuck, a tester disposed on the track and having a probe, and a processing unit in communication with the tester and configured to move the tester circumferentially around the wafer such that the probe is moved from a first portion on the wafer to a second portion on the wafer.

There is provided an electronic component handling apparatus which can be reduced in size or can improve the throughput when the number of contact arms is increased. A handler comprises: a plurality of contact arms which are arrayed along a first direction, each of the plurality of contact arms including a holding part which holds a DUT and including an adjustment unit which moves the holding part relative to a base part of each contact arm; an imaging unit capable of imaging the DUT and the holding part; an operation unit which operates the adjustment unit; and a moving unit which moves the imaging unit and the operation unit along an X direction. The adjustment unit adjusts the relative position of the holding part according to an operation of the operation unit.

There is provided an electronic component handling apparatus which can be reduced in size or can improve the throughput when the number of contact arms is increased. A handler comprises: a plurality of contact arms which are arrayed along a first direction, each of the plurality of contact arms including a holding part which holds a DUT and including an adjustment unit which moves the holding part relative to a base part of each contact arm; an imaging unit capable of imaging the DUT and the holding part; an operation unit which operates the adjustment unit; and a moving unit which moves the imaging unit and the operation unit along an X direction. The adjustment unit adjusts the relative position of the holding part according to an operation of the operation unit.

An analysis device analyzes inspection results of an inspection object which includes inspection target devices having respective electrodes on which needle marks are formed. The analysis device includes a display part for displaying an image, and an image generation part for generating an image to be displayed on the display part. The image generation part generates an analysis image based on information on inspection results with respect to the needle marks. The analysis image includes a needle mark scatter plot image showing positions of the needle marks with respect to the electrodes in each inspection target device in an overlapped manner, an inspection object map image showing a surface of the inspection object and showing needle mark inspection results with respect to the inspection target devices, and a captured image of the electrodes. Display contents of the images are linked with each other.

A calibration apparatus according to the present invention includes: a first acquisition unit configured to acquire a first measurement value, which is a measurement value of light from a screen of a display apparatus; a second acquisition unit configured to acquire a second measurement value, which is a measurement value of external light to the display apparatus; an allowable range determination unit configured to determine an allowable range of the first measurement value based on the second measurement value acquired by the second acquisition unit; and a measurement value determination unit configured to determine whether the first measurement value acquired by the first acquisition unit is a value within the allowable range determined by the allowable range determination unit.

A system providing a power source includes an electrical input and multiple electrical outputs. The electrical input is couplable to a current clamp that selectively clamps around at least one electrical conductor. A transformer coupled to the electrical input receives an input electrical signal from the at least one electrical conductor and produces an output electrical signal that is electrically isolated from the input electrical signal. Conversion circuitry electrically converts the output electrical signal to a converted electrical signal that is usable to power multiple electrical devices. Distribution circuitry distributes the converted electrical signal to the multiple electrical outputs, wherein each electrical output is couplable to an electrical device to provide power to the electrical device.

A wafer inspection device 10 is provided with a chuck top 20 on which a wafer W having semiconductor devices formed thereon is placed, a probe card 18 having multiple contact probes 28 protruding toward the wafer W, a pogo frame 23 for holding the probe card 18, a cylindrical internal bellows 26 configured to suspend from the pogo frame 23 to surround the contact probes 28, and a cylindrical external bellows 27 configured to suspend from the pogo frame 23 to surround the internal bellows 26. When the chuck top 20 approaches the probe card 18 and the contact probes 28 are brought into contact with the devices, the internal bellows 26 and the external bellows 27 come in contact with the chuck top 20, a sealing space P is formed between the internal bellows 26 and the external bellows 27, and the sealing space P is compressed.

A power supply apparatus supplies a power supply voltage V.sub.DD. The power supply apparatus includes a compensation circuit in addition to a main power supply. The compensation circuit receives, via its input, as a feedback signal, a detection signal V.sub.S that corresponds to the power supply voltage V.sub.DD. The compensation circuit has input/output characteristics f.sub.IO that correspond to the characteristics of the main power supply and the characteristics of a target power supply to be emulated. The compensation circuit injects or otherwise draws a compensation current i.sub.COMP that corresponds to the detection signal V.sub.S to or otherwise from a node for generating the power supply voltage V.sub.DD.

A power supply apparatus supplies a power supply voltage V.sub.DD. The power supply apparatus includes a compensation circuit in addition to a main power supply. The compensation circuit receives, via its input, as a feedback signal, a detection signal V.sub.S that corresponds to the power supply voltage V.sub.DD. The compensation circuit has input/output characteristics f.sub.IO that correspond to the characteristics of the main power supply and the characteristics of a target power supply to be emulated. The compensation circuit injects or otherwise draws a compensation current i.sub.COMP that corresponds to the detection signal V.sub.S to or otherwise from a node for generating the power supply voltage V.sub.DD.