A method for detecting power oscillation in an electric power grid, wherein the method comprises: integrating a filtered signal on a first interval, the filtered signal being associated with the electric power grid; based on the integration of the filtered signal on the first interval, determining a positive half-period area of the filtered signal and a negative half-period area of the filtered signal, one of the positive half-period area and negative half-period area being immediately subsequent to the other one; and determining that a power oscillation in the electric power grid is detected if the following two conditions are met: a sum of the positive half-period area of the filtered signal and the negative half-period area of the filtered signal is below a first threshold; and the absolute value of one of the positive half-period area and negative half-period area is above a second threshold.

A zero-cross detection device includes: an input terminal configured to receive an input voltage via a diode from an application terminal for an alternating-current voltage relative to a reference potential; an input circuit including a resistor between the input terminal and a terminal at the reference potential; a period detection circuit configured to detect the length of the period of the alternating-current voltage based on the interval of the timings at which the input voltage exceeds a threshold voltage; a peak detection circuit configured to detect the peak timing at which the input voltage reaches a peak in each period of the alternating-current voltage; and a zero-cross timing detection circuit configured to detect the zero-cross timing of the alternating-current voltage based on the results of detection by the period detection circuit and the peak detection circuit.

A zero-cross detection device includes: an input terminal configured to receive an input voltage via a diode from an application terminal for an alternating-current voltage relative to a reference potential; an input circuit including a resistor between the input terminal and a terminal at the reference potential; a period detection circuit configured to detect the length of the period of the alternating-current voltage based on the interval of the timings at which the input voltage exceeds a threshold voltage; a peak detection circuit configured to detect the peak timing at which the input voltage reaches a peak in each period of the alternating-current voltage; and a zero-cross timing detection circuit configured to detect the zero-cross timing of the alternating-current voltage based on the results of detection by the period detection circuit and the peak detection circuit.

A method for detecting a variation of input voltage. The method is generating an indication signal based on the input voltage, and comparing the input voltage with a first reference signal. The first reference signal is smaller than the indication signal, and if the input voltage is consistently smaller than the first reference signal during a first time duration from the moment when the input voltage is decreased to the first reference signal, the indication signal is decreased after the first time duration.

A method for detecting a variation of input voltage. The method is generating an indication signal based on the input voltage, and comparing the input voltage with a first reference signal. The first reference signal is smaller than the indication signal, and if the input voltage is consistently smaller than the first reference signal during a first time duration from the moment when the input voltage is decreased to the first reference signal, the indication signal is decreased after the first time duration.

The voltage hold circuit is a voltage hold circuit configured to operate every processing cycle, the processing cycle including a hold period and a reset period following the hold period, and hold a voltage value for an input voltage signal, the voltage hold circuit including: a first hold circuit configured to operate to hold a minimum voltage value for the input voltage signal in the hold period every the processing cycle; and a second hold circuit configured to operate to hold a maximum voltage value for the input voltage signal in the reset period every the processing cycle.

The voltage hold circuit is a voltage hold circuit configured to operate every processing cycle, the processing cycle including a hold period and a reset period following the hold period, and hold a voltage value for an input voltage signal, the voltage hold circuit including: a first hold circuit configured to operate to hold a minimum voltage value for the input voltage signal in the hold period every the processing cycle; and a second hold circuit configured to operate to hold a maximum voltage value for the input voltage signal in the reset period every the processing cycle.

Examples of operating an Intelligent Electronic Device (IED) during power swings, are described. In an example, voltage measurements for a phase is received and sampled. Root mean square (RMS) values of the voltage samples is calculated based on the voltage measurements. Delta quantities for each phase are calculated based on the RMS values. Each of the RMS values and delta quantities are associated with respective sampling instants. In response to a delta quantity being greater than a predefined threshold, a peak delta quantity is detected. A time interval between a sampling instant associated with the peak delta quantity and a sampling instant associated with a first delta quantity is determined. Based on a comparison of the time interval with a threshold time, a disturbance condition may be detected as a power swing and consequently, fault detection at the IED may be blocked.

A switching arrangement for monitoring AC signals includes: one or a plurality of comparators, to which an AC signal to be monitored or a signal obtained therefrom is feedable in each case at a first comparison input, for comparison with a defined amplitude threshold value present at a second comparison input, so as to generate a first output signal at an output; a zero crossing detector, to which a reference signal or a signal obtained therefrom is feedable at a monitoring input, so as to generate a second output signal at an output of the zero crossing detector; a first timing element downstream of the zero crossing detector configured to generate a first clock signal as a function of the second output signal; and a second timing element downstream of the zero crossing detector configured to generate a second clock signal as a function of the second output signal.

A switching arrangement for monitoring AC signals includes: one or a plurality of comparators, to which an AC signal to be monitored or a signal obtained therefrom is feedable in each case at a first comparison input, for comparison with a defined amplitude threshold value present at a second comparison input, so as to generate a first output signal at an output; a zero crossing detector, to which a reference signal or a signal obtained therefrom is feedable at a monitoring input, so as to generate a second output signal at an output of the zero crossing detector; a first timing element downstream of the zero crossing detector configured to generate a first clock signal as a function of the second output signal; and a second timing element downstream of the zero crossing detector configured to generate a second clock signal as a function of the second output signal.