A resonant switching power converter includes: plural capacitors; plural switches; at least one charging inductor; at least one discharging inductor; a controller which generates a charging operation signal and at least one discharging operation signal; and at least one zero current detection circuit which detects a charging resonant current flowing through the charging inductor in a charging process and/or detect a discharging resonant current flowing through the discharging inductor in a discharging process. When detecting that a level of the charging resonant current or a level of the discharging resonant current is zero, the zero current detection circuit generates at least one zero current detection signal which is sent to the controller. The controller determines start time points and end time points of the charging process and the discharging process according to the zero current detection signal. There can be plural discharging processes.

An estimate of the initial position of a rotor is made by monitoring sensed motor current signals which are amplitude and phase modulated with the rotor flux position in response to a high frequency voltage signal injection. The motor current signals are envelope detected to determine zero crossing points. Samples are taken of the motor current signals at positive and negative offsets from the zero crossing point, with the samples processed to identify a direction of the rotor flux axis. Further samples of at least one motor current signal are taken with respect to a certain phase reference, and the samples compared to resolve a polarity of the rotor flux axis which is indicative of the angular position of the rotor.

An estimate of the initial position of a rotor is made by monitoring sensed motor current signals which are amplitude and phase modulated with the rotor flux position in response to a high frequency voltage signal injection. The motor current signals are envelope detected to determine zero crossing points. Samples are taken of the motor current signals at positive and negative offsets from the zero crossing point, with the samples processed to identify a direction of the rotor flux axis. Further samples of at least one motor current signal are taken with respect to a certain phase reference, and the samples compared to resolve a polarity of the rotor flux axis which is indicative of the angular position of the rotor.

A zero-crossing detection circuit coupled to a power factor correction (PFC) controller of a power supply system includes a zener diode configured to generate a zener reference signal, and an operational amplifier coupled to the zener diode and configured to receive the zener reference signal and a feedback signal corresponding to an output current of the power supply system, and to generate a zero-crossing signal to a zero-crossing input of the PFC controller.

Systems and methods of detecting failures in an assembly that uses a variable differential transformer sensor. In one embodiment, a signal processor receives an excitation signal applied to the sensor, and detects a zero-crossing of the excitation signal. The signal processor receives an output signal of the variable differential transformer sensor in response to the excitation signal, and detects a zero-crossing of the output signal. The signal processor detects a fault in the assembly responsive to a determination that the zero-crossing of the output signal is separated from the zero-crossing of the excitation signal by more than the detection threshold.

Systems and methods of detecting failures in an assembly that uses a variable differential transformer sensor. In one embodiment, a signal processor receives an excitation signal applied to the sensor, and detects a zero-crossing of the excitation signal. The signal processor receives an output signal of the variable differential transformer sensor in response to the excitation signal, and detects a zero-crossing of the output signal. The signal processor detects a fault in the assembly responsive to a determination that the zero-crossing of the output signal is separated from the zero-crossing of the excitation signal by more than the detection threshold.

A zero-crossing detection circuit can include: a state judging circuit that generates a judging signal based on whether a body diode of a synchronous power switch is conducting when the synchronous power switch is off; a regulation voltage generator that reduces a regulation voltage when the judging signal indicates that the body diode is conducting, and increases the regulation voltage when the judging signal indicates that the body diode is not conducting, where a detection voltage includes a sum of the regulation voltage and a voltage at a first terminal of the synchronous power switch; and a comparison circuit that compares the detection voltage against a voltage at a second terminal of the synchronous power switch, and generates a zero-crossing detection signal that is activated to turn off the synchronous power switch when the detection voltage equals the voltage at the second terminal of the synchronous power switch.

A zero-crossing detection circuit can include: a state judging circuit that generates a judging signal based on whether a body diode of a synchronous power switch is conducting when the synchronous power switch is off; a regulation voltage generator that reduces a regulation voltage when the judging signal indicates that the body diode is conducting, and increases the regulation voltage when the judging signal indicates that the body diode is not conducting, where a detection voltage includes a sum of the regulation voltage and a voltage at a first terminal of the synchronous power switch; and a comparison circuit that compares the detection voltage against a voltage at a second terminal of the synchronous power switch, and generates a zero-crossing detection signal that is activated to turn off the synchronous power switch when the detection voltage equals the voltage at the second terminal of the synchronous power switch.

The invention relates to a circuit arrangement for combined protection of a load from temporary and transient overvoltages with emergency operation of the load in the presence of a temporary overvoltage and with integrated follow current limitation, wherein a first surge arrester, in particular a spark gap or a varistor, is provided between network-side input terminals and a second surge arrester, in particular a varistor, is provided between load-side output terminals for follow current limitation. According to the invention, at least one controlled semiconductor switch is provided in each case in the series branch between the input terminal and the output terminal and in the output-side parallel branch, wherein a mechanical switch and a series capacitance are connected in parallel with the semiconductor switch in the series branch. Furthermore, the semiconductor switch in the parallel branch is part of a series circuit comprising a parallel circuit comprising a second surge arrester and a parallel capacitance. A series inductance is provided in the series branch between the input terminal and the parallel circuit comprising the series capacitance, the controlled semiconductor switch and the mechanical switch. A microcontroller for controlling the semiconductor switches is also present, wherein the microcontroller is connected to a current detector in the series branch.

The invention relates to a circuit arrangement for combined protection of a load from temporary and transient overvoltages with emergency operation of the load in the presence of a temporary overvoltage and with integrated follow current limitation, wherein a first surge arrester, in particular a spark gap or a varistor, is provided between network-side input terminals and a second surge arrester, in particular a varistor, is provided between load-side output terminals for follow current limitation. According to the invention, at least one controlled semiconductor switch is provided in each case in the series branch between the input terminal and the output terminal and in the output-side parallel branch, wherein a mechanical switch and a series capacitance are connected in parallel with the semiconductor switch in the series branch. Furthermore, the semiconductor switch in the parallel branch is part of a series circuit comprising a parallel circuit comprising a second surge arrester and a parallel capacitance. A series inductance is provided in the series branch between the input terminal and the parallel circuit comprising the series capacitance, the controlled semiconductor switch and the mechanical switch. A microcontroller for controlling the semiconductor switches is also present, wherein the microcontroller is connected to a current detector in the series branch.