A measuring device for measuring a power of a measurement signal comprises an analog-processing unit (1) and a calibration unit (5) for the implementation of a calibration procedure. The analog-processing unit (1) provides two detector diodes (14, 15) connected in an antiparallel manner relative to a signal input (10) and an amplifier (50) for the amplification of signals which are derived from output signals of the detector diodes (14, 15). The analog-processing unit (1) further provides a chopper unit (28) which is connected at two terminals in series between the detector diodes (14, 15) and the amplifier (50). In this context, the calibration unit (5) comprises at least one current source, wherein the current sources (46, 47) is connected to at least one input terminal of the amplifier (50).

A power detector (100, 200, 300, 400) comprising a first (110) and a second (115) bipolar junction/FET transistor. The first transistor (110) is arranged as a common base/gate transistor with its base/gate being biased by a bias voltage (V.sub.b1) and the second transistor (115) is arranged as a common emitter/source transistor with its emitter/source being grounded. The power detector also comprises a diode or current source connected to ground from the emitter/source of the first transistor (110), in which power detector an input port (105) is connected to the emitter of the first transistor (110) and to the base/gate of the second transistor (115), and an output port (125) is connected to the collectors/drains of the first (110) and second transistor (115), said collectors/drains also being connected to a DC supplier (V.sub.c) via a first resistor (130).

A power detector (100, 200, 300, 400) comprising a first (110) and a second (115) bipolar junction/FET transistor. The first transistor (110) is arranged as a common base/gate transistor with its base/gate being biased by a bias voltage (V.sub.b1) and the second transistor (115) is arranged as a common emitter/source transistor with its emitter/source being grounded. The power detector also comprises a diode or current source connected to ground from the emitter/source of the first transistor (110), in which power detector an input port (105) is connected to the emitter of the first transistor (110) and to the base/gate of the second transistor (115), and an output port (125) is connected to the collectors/drains of the first (110) and second transistor (115), said collectors/drains also being connected to a DC supplier (V.sub.c) via a first resistor (130).

An integrated circuit includes a power amplifier and a power detector. The power detector has a VDET node and a VREF node. A first filter coupled to the VDET node outputs a signal VDET onto a VDET terminal. A second filter coupled the VREF node outputs a signal VREF onto a VREF terminal. The signals VDET and VREF are generated so that the voltage difference between the two signals varies in proportion to the RF output power magnitude with an accuracy of 0.1 decibels over a 45 C. to +85 C. temperature range. An amount of the RF signal as output by the power amplifier is coupled onto the VDET node and is detected by a half-wave rectifying RF detector diode. The diode has a capacitance that increases with temperature, so a temperature compensation circuit that has an admittance that decreases with temperature is coupled in parallel with the detector diode.

An electronic device may include an antenna, a receiver, and a transmission line path that couples the antenna to the receiver. A peak detector may receive a radio-frequency signal from the transmission line path and may output a DC voltage indicative of a peak voltage level of the signal. The peak detector may include a pair of square law transistors having source-drain terminals coupled to an output of the peak detector. The peak detector may include a differential pair of transistors coupled between a power supply voltage and the output. The peak detector may include diode-connected transistors coupled between the source-drain terminals and gate terminals of the square law transistors. The diode-connected transistors may cause noise current to flow along feedback loop paths from the source-drain terminals onto the gate terminals of the square law transistors. This may remove noise from the output of the peak detector.

An automatic gain control system and a control method, a power detector and a radio frequency receiver are provided, wherein the power detector includes: a detection circuit, having a first and second input terminals connected to respective first and second differential output terminals of the trans-impedance amplifier, and configured to sample a peak of a differential output signal of the trans-impedance amplifier along with a clock cycle and provide a differential detection signal at a first output node; a filter circuit converts energy of the differential detection signal obtained at the first output node into an output voltage, so that the power detector may be used to detect an output power of the trans-impedance amplifier and adjust, by a control logic unit, a gain or an output power of a low noise amplifier connected to a radio frequency signal.

Exemplary embodiments are disclosed of methods and systems of power detection in RF circuits to provide gain compensation for vehicle systems. In exemplary embodiments, a module (e.g., a front end module (FEM), compensor, compensator, etc.) includes a gain modifier, a power detector, and a controller. The power detector is configured to detect a power output of the gain modifier. The controller is configured to determine a mean of n samples taken by the power detector. The controller is also configured to determine a boundary to mean ratio of the n samples. The controller is further configured to adjust a detected value of the power detector based on the mean and the boundary to mean ratio.

Exemplary embodiments are disclosed of methods and systems of power detection in RF circuits to provide gain compensation for vehicle systems. In exemplary embodiments, a module (e.g., a front end module (FEM), compensor, compensator, etc.) includes a gain modifier, a power detector, and a controller. The power detector is configured to detect a power output of the gain modifier. The controller is configured to determine a mean of n samples taken by the power detector. The controller is also configured to determine a boundary to mean ratio of the n samples. The controller is further configured to adjust a detected value of the power detector based on the mean and the boundary to mean ratio.