A method measures a frequency characteristic at a feed axis control unit configured to drive a motor in accordance with a velocity command value to control a velocity or a position of a movable portion of a driven body. The velocity command value includes a velocity reference value from a host device or a velocity command calculator and a sweep signal swept in order to measure the frequency characteristic. The method includes moving the feed axis in one direction by commanding the velocity reference value where a moving velocity of the feed axis is constant, exciting by providing a sine wave having an amplitude less than a magnitude of the velocity reference value to the sweep signal, and measuring the frequency characteristic of a feed axis drive system including the motor.

A method measures a frequency characteristic at a feed axis control unit configured to drive a motor in accordance with a velocity command value to control a velocity or a position of a movable portion of a driven body. The velocity command value includes a velocity reference value from a host device or a velocity command calculator and a sweep signal swept in order to measure the frequency characteristic. The method includes moving the feed axis in one direction by commanding the velocity reference value where a moving velocity of the feed axis is constant, exciting by providing a sine wave having an amplitude less than a magnitude of the velocity reference value to the sweep signal, and measuring the frequency characteristic of a feed axis drive system including the motor.

For passive sensor with resonator having a natural frequency, a method comprises: a first phase emission of an electromagnetic signal toward the passive sensor at an emission frequency, the resonator oscillating in a forced regime at the emission frequency and then oscillating at its natural frequency when the emission is cut off; a first phase reception of the damped signal oscillating at natural frequency emitted by passive sensor, a measurement of the frequency being performed; a second phase emission of an electromagnetic signal at the measured frequency toward the passive sensor, the resonator oscillating in a forced regime at the measured frequency and then oscillating at its natural frequency when the emission is cut off; a second phase reception of the damped signal oscillating at natural frequency, a measurement of the frequency being performed, determination of the natural frequency being stopped due to measurement performed in this second reception phase.

For passive sensor with resonator having a natural frequency, a method comprises: a first phase emission of an electromagnetic signal toward the passive sensor at an emission frequency, the resonator oscillating in a forced regime at the emission frequency and then oscillating at its natural frequency when the emission is cut off; a first phase reception of the damped signal oscillating at natural frequency emitted by passive sensor, a measurement of the frequency being performed; a second phase emission of an electromagnetic signal at the measured frequency toward the passive sensor, the resonator oscillating in a forced regime at the measured frequency and then oscillating at its natural frequency when the emission is cut off; a second phase reception of the damped signal oscillating at natural frequency, a measurement of the frequency being performed, determination of the natural frequency being stopped due to measurement performed in this second reception phase.

A voltage-controlled oscillator gain measurement system includes a voltage-controlled oscillator, a voltage detector, and a processor. The voltage-controlled oscillator, which is configured in a phase-locked loop circuit, generates an output signal with an output frequency according to a control signal. The control signal is generated according to the output signal divided by a scaling number. The voltage detector is configured to measure a voltage difference of the control signal. The processor adjusts the scaling number to generate an output frequency difference of the output signal, and obtains a reciprocal gain of the voltage-controlled oscillator by dividing the voltage difference by the output frequency difference.

A voltage-controlled oscillator gain measurement system includes a voltage-controlled oscillator, a voltage detector, and a processor. The voltage-controlled oscillator, which is configured in a phase-locked loop circuit, generates an output signal with an output frequency according to a control signal. The control signal is generated according to the output signal divided by a scaling number. The voltage detector is configured to measure a voltage difference of the control signal. The processor adjusts the scaling number to generate an output frequency difference of the output signal, and obtains a reciprocal gain of the voltage-controlled oscillator by dividing the voltage difference by the output frequency difference.

A method of frequency estimation. A clock output from a frequency synthesizer is received at an input of a ring encoder. The ring encoder generates outputs including a ring encoder output clock and an encoded output which represents LSBs of a clock cycle count of the clock output. A binary counter is run using the ring encoder output clock which provides an output count which represents MSBs of the clock cycle count. Using a reference clock, the encoded output is sampled to provide a sampled encoded output and the output count is sampled to provide a sampled output count. Error correcting is applied to the sampled encoded output to provide a corrected sampled encoded output. The corrected sampled encoded output and sampled output count are combined to provide a combined output which is used for estimating an instantaneous or average frequency of the clock output.

A method of frequency estimation. A clock output from a frequency synthesizer is received at an input of a ring encoder. The ring encoder generates outputs including a ring encoder output clock and an encoded output which represents LSBs of a clock cycle count of the clock output. A binary counter is run using the ring encoder output clock which provides an output count which represents MSBs of the clock cycle count. Using a reference clock, the encoded output is sampled to provide a sampled encoded output and the output count is sampled to provide a sampled output count. Error correcting is applied to the sampled encoded output to provide a corrected sampled encoded output. The corrected sampled encoded output and sampled output count are combined to provide a combined output which is used for estimating an instantaneous or average frequency of the clock output.

Curtaining artifacts on high aspect ratio features are reduced by reducing the distance between a protective layer and feature of interest. For example, the ion beam can mill at an angle to the work piece surface to create a sloped surface. A protective layer is deposited onto the sloped surface, and the ion beam mills through the protective layer to expose the feature of interest for analysis. The sloped mill positions the protective layer close to the feature of interest to reduce curtaining.

A counter is started on the falling edge of a tach pulse. This counter counts to the rising edge of a second tach pulse, such as the next tach pulse. During the duration of the tach pulse the FPGA calculates the RPM of a motor. In this way, during each commutation period, a RPM is calculated. The present system performs a RPM calculation during each commutation period and/or tach pulse duration.