A burn-in board management system includes a production burn-in apparatus and a burn-in board status computer. The production burn-in apparatus is configured to test a plurality of integrated circuit devices mounted in slots of a burn-in board and comprising a first controller configured to generate a first burn-in board status map, wherein the first controller is further configured to suspend the burn-in board when the first burn-in board status map of the burn-in board demonstrates that more than a threshold percentage of the slots of the burn-in board are determined to be malfunctioned. The burn-in board status computer is communicably connected with the first controller of the production burn-in apparatus and configured to receive the first burn-in board status map.

Embodiments of the present disclosure relate to a monitoring circuit and a semiconductor device, and particularly, to a monitoring circuit including an oscillation circuit configured to generate an oscillation signal having a rising characteristic or a falling characteristic according to a threshold voltage level and a counter configured to count the number of rises or the number of falls of the oscillation signal, and a semiconductor device including the monitoring circuit.

An exemplary method of detecting a Trojan circuit in an integrated circuit is related to applying a test pattern comprising an initial test pattern followed by a corresponding succeeding test pattern to a golden design of the integrated circuit, wherein a change in the test pattern increases side-channel sensitivity; measuring a side-channel parameter in the golden design of the integrated circuit after application of the test pattern; applying the test pattern to a design of the integrated circuit under test; measuring the side-channel parameter in the design of the integrated circuit under test after application of the test pattern; and determining a Trojan circuit to be present in the integrated circuit under test when the measured side-channel parameters vary by a threshold.

An electronic component handling apparatus handles a device under test (DUT). The electronic component handling apparatus includes: contact units that adjust a temperature of the DUT independently from one another and press the DUT against a socket independently from one another. The socket is disposed on a test head that is mounted to each of the contact units and that is connected to a tester. At least one of the contact units is removably disposed on the electronic component handling apparatus.

A test carrier that accommodates a DUT and includes a first flow passage through which fluid supplied from an outside of the test carrier flows.

A display panel and a display apparatus are provided, the display panel includes a substrate, a plurality of sub-pixels, a plurality of data lines, and a crack detection line. A first peripheral area surrounds a display area; the plurality of data lines are connected to the plurality of sub-pixels; and the crack detection line surrounds the display area, is arranged along the edge of the first peripheral area and a second peripheral region, and is connected to at least one of the plurality of data lines.

An optical probe includes a core part and a clad part arranged along an outer circumference of the core part, and has an incident surface having a radius of curvature R through which an optical signal enters. The radius of curvature R and a central half angle ω at an incident point of the optical signal on the incident surface fulfil the following formulae using a radiation angle γ of the optical signal, an effective incident radius Se of the optical signal transmitted in the core part without penetrating into the clad part on the incident surface, a refractive index n(r) of the core part at the incident point, and a refracting angle β at the incident point:

R=Se/sin(ω)

ω=±sin.sup.−1{[K2.sup.2/(K1.sup.2+K2.sup.2)].sup.1/2}

where K1=n(r)×cos(β)−cos(γ/2) and K2=n(r)×sin(β)−sin(γ/2).

Examples of determining electronic component authenticity via electronic signal signature measurement are discussed. Reference pin identifiers corresponding to pins of a known authentic electronic component are determined. Measurement values corresponding to characteristics of pins of an electronic component are obtained, and pin identifiers based on the measurement values are generated. Accordingly, an indication that the electronic component is authentic can be provided based at least in part on a comparison of the pin identifiers and the reference pin identifiers.

A method of inspecting a sensor including generating a first model based on first big-data including first inspection results for sensors of a same type connected to a current inspection environment, generating first target characteristic coefficients for channels included in the first model, generating first characteristic coefficients for channels included in a current sensor, and generating first compensation coefficients for the channels included in the current sensor based on the first target characteristic coefficients and the first characteristic coefficients.

A temporary bond method and apparatus for allowing wafers, chips or chiplets. To be tested, the temporary bond method and apparatus comprising: a temporary connection apparatus having one of more knife-edged microstructures, wherein the temporary connection apparatus serves, in use, as a probe device for probing the chiplets, each chiplet including a die having one or more flat contact pads which mate with the one of more knife-edged microstructures of the temporary connection apparatus; a press apparatus for applying pressure between the one or more flat contact pads on the chiplet with the one of more knife-edged microstructures of the temporary connection apparatus thereby forming a temporary bond between the temporary connection pad with the knife-edged microstructure in contact with the one or more flat wafer pads; the press being able to apply a pressure to maintain the temporary bond connection during or prior to testing of the chiplet.