G02F2202/10

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR, AND DISPLAY PANEL

Provided are an array substrate and a manufacturing method therefor, and a display panel. The array substrate comprises: a base substrate; a data line and a passivation layer which are formed on the base substrate; a common electrode layer formed on the passivation layer; and a shielding electrode layer and a barrier layer which are formed on the base substrate, wherein the shielding electrode layer is arranged between the data line and the passivation layer, the barrier layer is arranged between the data line and the shielding electrode layer, the shielding electrode layer is grounded, and the barrier layer is made of a material with an insulation function.

ARRAY SUBSTRATE AND LIQUID CRYSTAL DISPLAY
20170242283 · 2017-08-24 · ·

An array substrate according to the present invention includes a non-linear element. The non-linear element includes a first insulation film disposed so as to cover a light-shielding body, an oxide semiconductor film disposed on the first insulation film so as to overlap the light-shielding body in a plan view, a source electrode and a drain electrode that are disposed so as to be apart from each other with a separation portion therebetween on the oxide semiconductor film, a second insulation film disposed so as to cover the oxide semiconductor film, the source electrode, and the drain electrode, and a first back electrode disposed on a third insulation film and connected to a source wire through a first contact hole. The first back electrode is disposed so as to overlap the source electrode and part of the separation portion on the oxide semiconductor film in a plan view.

Liquid crystal display device

The present invention has a pixel which includes a first switch, a second switch, a third switch, a first resistor, a second resistor, a first liquid crystal element, and a second liquid crystal element. A pixel electrode of the first liquid crystal element is electrically connected to a signal line through the first switch. The pixel electrode of the first liquid crystal element is electrically connected to a pixel electrode of the second liquid crystal element through the second switch and the first resistor. The pixel electrode of the second liquid crystal element is electrically connected to a Cs line through the third switch and the second resistor. A common electrode of the first liquid crystal element is electrically connected to a common electrode of the second liquid crystal element.

ARRAY SUBSTRATE AND MANUFACTURE METHOD THEREOF, DISPLAY DEVICE

The present invention provides an array substrate, and the array substrate includes a substrate, a buffer layer, a semiconductor layer, a gate isolation layer, a gate metal layer, a source drain metal layer, a flat layer, an interlayer insulation layer, a common electrode layer, a passivation layer and a pixel electrode layer, which are sequentially formed on the substrate, wherein the array substrate further comprises a common signal adjustment structure formed at the common electrode layer, and the common signal adjustment structure and the common electrode layer are together employed to be a common electrode for transmitting a common signal to reduce a resistance in a common signal transmission process. The present invention further provides the aforesaid array substrate and a manufacture method thereof, a display device.

SEMICONDUCTOR DEVICE, LIQUID CRYSTAL DISPLAY DEVICE, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
20170235173 · 2017-08-17 ·

A semiconductor device includes: a first metal layer including a gate electrode; a first insulating layer provided on the first metal layer; an oxide semiconductor layer provided on the first insulating layer; a second insulating layer provided on the oxide semiconductor layer; a second metal layer provided on the oxide semiconductor layer and the second insulating layer, the second metal layer including a source electrode; a third insulating layer provided on the second metal layer; and a first transparent electrode layer provided on the third insulating layer. The oxide semiconductor layer includes a first portion lying above the gate electrode and a second portion extending from the first portion so as to lie across an edge of the gate electrode on the drain electrode side. The third insulating layer does not include an organic insulating layer. The second insulating layer and the third insulating layer have a first contact hole which overlaps the second portion of the oxide semiconductor layer when viewed in a normal direction of the substrate. The first transparent electrode layer includes a transparent electrically-conductive layer which is in contact with the second portion of the oxide semiconductor layer in the first contact hole.

PIEZO ELECTROPHORETIC DISPLAY
20220035219 · 2022-02-03 ·

Provided herein is an electro-optic display having a layer of electrophoretic material, a first conductive layer, and a piezoelectric material positioned between the layer of electrophoretic material and the first conductive layer, the piezoelectric material overlaps with a portion of the layer of electrophoretic material, and a portion of the first conductive layer overlaps with the rest of the electrophoretic material.

OPTICAL SYSTEM WITH BLUE LIGHT ABSORBING LAYER

An optical system includes a display, a backlight configured to emit at least a light in a first wavelength range extending between about 400 nm and about 500 nm, and an optical film disposed adjacent the backlight and configured to absorb a light in a second wavelength range extending between about 415 nm to about 455 nm, wherein a ratio of the light in the second wavelength range transmitted by the optical film to the light in the first wavelength range transmitted by the optical film is less than or equal to 50%.

Actively Tunable Polar-Dielectric Optical Devices

Optical devices that include one or more structures fabricated from polar-dielectric materials that exhibit surface phonon polaritons (SPhPs), where the SPhPs alter the optical properties of the structure. The optical properties lent to these structures by the SPhPs are altered by introducing charge carriers directly into the structures. The carriers can be introduced into these structures, and the carrier concentration thereby controlled, through optical pumping or the application of an appropriate electrical bias.

DISPLAY DEVICE
20220270561 · 2022-08-25 ·

A display panel for displaying an image is provided with a plurality of pixels arranged in a matrix. Each pixel includes one or more units each including a plurality of subunits. Each subunit includes a transistor in which an oxide semiconductor layer which is provided so as to overlap a gate electrode with a gate insulating layer interposed therebetween, a pixel electrode which drives liquid crystal connected to a source or a drain of the transistor, a counter electrode which is provided so as to face the pixel electrode, and a liquid crystal layer provided between the pixel electrode and the counter electrode. In the display panel, a transistor whose off current is lower than 10zA/μm at room temperature per micrometer of the channel width and off current of the transistor at 85° C. can be lower than 100zA/μm per micrometer in the channel width.

Backlight unit and liquid crystal display including the same

A backlight unit for a liquid crystal display device, the backlight unit including: an light emitting diode (“LED”) light source; a light conversion layer disposed separate from the LED light source to convert light emitted from the LED light source to white light and to provide the white light to the liquid crystal panel; and a light guide panel disposed between the LED light source and the light conversion layer, wherein the light conversion layer includes a semiconductor nanocrystal and a polymer matrix, and wherein the polymer matrix includes a first polymerized polymer of a first monomer including at least two thiol (—SH) groups, each located at a terminal end of the first monomer, and a second monomer including at least two unsaturated carbon-carbon bonds, each located at a terminal end of the second monomer.