Extreme ultraviolet (EUV) mask blanks, methods for their manufacture and production systems therefor are disclosed. The EUV mask blanks comprise a substrate; a multilayer stack of reflective layers on the substrate; a capping layer on the multilayer stack of reflecting layers; an absorber layer on the capping layer, the absorber layer comprising a tantalum-containing material; and a hard mask layer on the absorber layer, the hard mask layer comprising a hard mask material selected from the group consisting of CrO, CrON, TaNi, TaRu and TaCu.

According to one embodiment, a method for displaying an index value in generation of a mask pattern verification model includes: calculating a first index value using a plurality of images; estimating a model on the basis of the first index value and pattern information; calculating a second index value using the model; and displaying at least one of the first index value and the second index value.

According to one embodiment, a method for displaying an index value in generation of a mask pattern verification model includes: calculating a first index value using a plurality of images; estimating a model on the basis of the first index value and pattern information; calculating a second index value using the model; and displaying at least one of the first index value and the second index value.

A mask plate, a method for manufacturing a mask plate, and a method for manufacturing an organic light-emitting device are disclosed. The mask plate includes a substrate and a first opening portion and a second opening portion formed on the substrate. The first opening portion includes a first edge and a second edge, an extending line of the first edge and an extending line of the second edge intersect at a first vertex to form a first corner, the second opening portion is at the first corner and protrudes outward, and an edge of the second opening portion intersects with the first edge and the second edge. The first opening portion and the second opening portion are used for evaporation on a display area of an organic light-emitting device, and the second opening portion is used to compensate for a corner of the display area during evaporation.

A method of cutting fins includes the following steps. A photomask including a snake-shape pattern is provided. A photoresist layer is formed over fins on a substrate. A photoresist pattern in the photoresist layer corresponding to the snake-shape pattern is formed by exposing and developing. The fins are cut by transferring the photoresist pattern and etching cut parts of the fins.

A method includes transporting a cleaning mask and a photomask into an enclosure of a lithography exposure apparatus, wherein the photomask includes a multilayered mirror structure, and the cleaning mask is free of the multilayered mirror structure; placing the cleaning mask on a reticle stage of the lithography exposure apparatus; and charging the cleaning mask to attract charged particles in the enclosure.

A mask for use in a semiconductor lithography process includes a substrate, a mask pattern disposed on the substrate, and a light absorbing border surrounding the mask pattern. The light absorbing border is inset from at least two edges of the substrate to define a peripheral region outside of the light absorbing border. In some designs, a first peripheral region extends from an outer perimeter of the light absorbing border to a first edge of the substrate, and a second peripheral region that extends from the outer perimeter of the light absorbing border to a second edge of the substrate, where the first edge of the substrate and the second edge of the substrate are on opposite sides of the mask pattern.

Examples of a multiple-mask multiple-exposure lithographic technique and suitable masks are provided herein. In some examples, a photomask includes a die area and a stitching region disposed adjacent to the die area and along a boundary of the photomask. The stitching region includes a mask feature for forming an integrated circuit feature and an alignment mark for in-chip overlay measurement.

Examples of a multiple-mask multiple-exposure lithographic technique and suitable masks are provided herein. In some examples, a photomask includes a die area and a stitching region disposed adjacent to the die area and along a boundary of the photomask. The stitching region includes a mask feature for forming an integrated circuit feature and an alignment mark for in-chip overlay measurement.

A memory device is provided. The memory device includes a main feature disposed beneath a surface of a photolithographic mask. The memory device further includes at least one Sub-Resolution Assistant Feature (SRAF) proximate to the main feature beneath the surface. The main feature has an electrical conductivity based on an area relationship with the at least one SRAF.