A method for fabricating a thick crack-free dielectric film on a wafer for device fabrication is disclosed herein. A stress-release pattern is fabricated in an oxide layer of the wafer, which surrounds a number of device regions. The stress-release pattern comprises a plurality of recessions, which are spaced periodically along at least one direction. The plurality of recessions interrupt the continuous film during the dielectric film deposition, to prevent cracks from forming in the dielectric film and propagating into the device regions. Such that, a thick crack-free dielectric film can be achieved in the device regions, which are formed by patterning the dielectric layer. Furthermore, conditions of the dielectric film deposition process can be tuned to ensure quality of the deposited dielectric film. Still further, a plurality of deposition runs may be performed to deposit the thick crack-free dielectric film.

An exposure apparatus including a micro light emitting diode display unit and a first projection optical system is provided. The micro light emitting diode display unit has a plurality of micro light emitting diodes. The micro light emitting diode display unit is adapted to individually control light emission signals of the micro light emitting diodes and forming a predetermined pattern. The first projection optical system is disposed on a light emitting path of the micro light emitting diode display unit. The first projection optical system is configured to form an exposure pattern on a photosensitive material layer at once by applying the predetermined pattern.

A method and a system for correcting lithography process hotspots based on stress damping adjustment are provided. The method includes: acquiring a mark hotspot of a mask pattern; forming N annuli centered on the mark hotspot from inner to outer on a mask; moving vertexes of the mask pattern located in each annulus by a specific distance in a direction deviating from the mark hotspot and connecting the moved vertexes according to an original connection relationship to acquire an updated layout; verifying electrical characteristics of the updated layout, determining whether a deviation of the electrical characteristics of the updated layout is within a tolerable range, and performing geometric correction to compensate for a deviation of electrical parameters if no is determined and then ending correction, or ending the correction if yes is determined.

An exemplary optical projection method and system is disclosed, e.g., femtosecond projection two-photon lithography (FP-TPL) based operation, that applies multiple temporally focused light with reduced density of the projected mask to control over-polymerization defects (e.g., without need to tune the photopolymer composition) when certain aspect ratio of the submicron features are desired.

A method to improve a lithographic process for imaging a portion of a design layout onto a substrate using a lithographic projection apparatus, the method including: obtaining a target feature; generating a perturbed target feature from the target feature by applying a perturbation thereto; generating a set of training examples includes the perturbed target feature and an indication as whether the perturbed target feature is deemed the same as the target feature; training a learning model with the set of training examples; classifying features in the portion of the design layout into at least two classes: being deemed the same as the target feature, and being deemed different from the target feature.

A projector of the present disclosure includes a light source that emits laser light, a metasurface element that modulates the phase of the laser light emitted from the light source, and a light modulation element that modulates the phase-modulated laser light emitted from the metasurface element to generate projection light.

Described is a resinous structure derived from fluorine-containing polymers useful as a mold having excellent dimensional stability.

The present disclosure relates to the technical field of semiconductors, and provides a method of processing a photoresist layer, and a photoresist layer. The method of processing a photoresist layer includes: forming a photoresist layer on a target layer, where the photoresist layer includes a first part close to the target layer and a second part away from the target layer; performing first exposure processing on the photoresist layer, and forming an exposure image in the first part of the photoresist layer; processing the second part of the photoresist layer by using a first process, such that the second part forms a third part, where a photosensitivity of the third part is higher than that of the first part; and stripping the third part.

Methods disclosed herein provide apparatus and method for applying an electric field and/or a magnetic field to a photoresist layer without air gap intervention during photolithography processes. In one embodiment, an apparatus includes a processing chamber comprising a substrate support having a substrate supporting surface, a heat source embedded in the substrate support configured to heat a substrate positioned on the substrate supporting surface, an electrode assembly configured to generate an electric field in a direction substantially perpendicular to the substrate supporting surface, wherein the electrode assembly is positioned opposite the substrate supporting surface having a downward surface facing the substrate supporting surface, wherein the electrode assembly is spaced apart from substrate support defining a processing volume between the electrode assembly and the substrate supporting surface, and a confinement ring disposed on an edge of the substrate support or the electrode assembly configured to retain an intermediate medium.

Disclosed are an amplitude monitoring system, a focusing and leveling apparatus and a defocus detection method. The defocus detection method comprises the steps of: adjusting amplitude of a scanning mirror (201) to a theoretical amplitude value and recording corresponding theoretical output voltage values of a photodetector (309) (S1); adjusting the amplitude of the scanning mirror (201) and sampling real-time amplitude values θi of the scanning mirror (201) and real-time output voltage values of the photodetector (309) to calculate compensated real-time demodulation results Si, and recording real-time defocus amounts Hi of a wafer table (305) (S2); subsequent to stepwise displacement of the wafer table (305), establishing a database based on the compensated real-time demodulation results Si and the real-time defocus amounts Hi of the wafer table (305) (S3); and in an actual measurement, sampling in real time an actual amplitude value θk of the scanning mirror (201) and actual output voltage values of the photodetector (309) to calculate a compensated real-time demodulation result Sk, and finding an actual defocus amount Hk of the wafer table (305) by searching the database using a linear interpolation method (S4). Such a focusing and leveling apparatus and defocus detection method avoid degraded stability of the scanning mirror due to long-time operation, which may lead to low wafer surface defocus measurement accuracy of the focusing and leveling apparatus.