In accordance with some embodiments, polarity-coincidence, adaptive time-delay estimation (PCC-ATDE), mixed-signal techniques are provided. In some embodiments, these techniques use 1-bit quantized signals and negative-feedback architectures to directly determine a time-delay between signals at analog inputs and convert the time-delay to a digital number.

In accordance with some embodiments, polarity-coincidence, adaptive time-delay estimation (PCC-ATDE), mixed-signal techniques are provided. In some embodiments, these techniques use 1-bit quantized signals and negative-feedback architectures to directly determine a time-delay between signals at analog inputs and convert the time-delay to a digital number.

An apparatus for interpolating between a first and a second signal is provided. The apparatus includes a plurality of interpolation cells coupled to a common node of the apparatus. Further, the apparatus includes a control circuit configured to supply, based on a control word, respective selection signals to each of the plurality of interpolation cells. At least one of the plurality of interpolation cells is configured to couple the common node to a first potential if the first signal and the second signal are both at a first signal level, couple the common node to a second potential, which is different from the first potential, if the first signal and the second signal are both at a second signal level, which is different from the first signal level, and to decouple the common node from at least one of the first potential and the second potential if the first signal and the second signal are at different signal levels. Additionally, the at least one of the plurality of interpolation cells is configured to switch, based on a state indicated by the respective selection signal, to coupling the common node to the second potential in response to a transition of either the leading one or the trailing one of the first signal and the second signal from the first signal level to the second signal level.

An apparatus for interpolating between a first and a second signal is provided. The apparatus includes a plurality of interpolation cells coupled to a common node of the apparatus. Further, the apparatus includes a control circuit configured to supply, based on a control word, respective selection signals to each of the plurality of interpolation cells. At least one of the plurality of interpolation cells is configured to couple the common node to a first potential if the first signal and the second signal are both at a first signal level, couple the common node to a second potential, which is different from the first potential, if the first signal and the second signal are both at a second signal level, which is different from the first signal level, and to decouple the common node from at least one of the first potential and the second potential if the first signal and the second signal are at different signal levels. Additionally, the at least one of the plurality of interpolation cells is configured to switch, based on a state indicated by the respective selection signal, to coupling the common node to the second potential in response to a transition of either the leading one or the trailing one of the first signal and the second signal from the first signal level to the second signal level.

Systems and methods are described for determining a phase measurement difference between a received modulated signal and a local clock signal. An adjusted local clock phase measurement may be determined by subtracting, from the phase measurement difference, a phase correction that is based on the frequency difference between the modulator signal's carrier frequency and the local clock's frequency. A phase modulation value may be generated by scaling the adjusted local clock phase measurement. The scaling may be based on a ratio of the modulated signal's carrier frequency and the local clock's frequency. The phase correction may be based on (i) a count of periods of the modulated signal occurring between each corrected phase measurement and (ii) a difference between the carrier frequency and the local clock frequency.

Systems and methods are described for determining a phase measurement difference between a received modulated signal and a local clock signal. An adjusted local clock phase measurement may be determined by subtracting, from the phase measurement difference, a phase correction that is based on the frequency difference between the modulator signal's carrier frequency and the local clock's frequency. A phase modulation value may be generated by scaling the adjusted local clock phase measurement. The scaling may be based on a ratio of the modulated signal's carrier frequency and the local clock's frequency. The phase correction may be based on (i) a count of periods of the modulated signal occurring between each corrected phase measurement and (ii) a difference between the carrier frequency and the local clock frequency.

Systems and methods are described for determining a phase measurement difference between a received modulated signal and a local clock signal. An adjusted local clock phase measurement may be determined by subtracting, from the phase measurement difference, a phase correction that is based on the frequency difference between the modulator signal's carrier frequency and the local clock's frequency. A phase modulation value may be generated by scaling the adjusted local clock phase measurement. The scaling may be based on a ratio of the modulated signal's carrier frequency and the local clock's frequency. The phase correction may be based on (i) a count of periods of the modulated signal occurring between each corrected phase measurement and (ii) a difference between the carrier frequency and the local clock frequency.

Systems and methods are described for determining a phase measurement difference between a received modulated signal and a local clock signal. An adjusted local clock phase measurement may be determined by subtracting, from the phase measurement difference, a phase correction that is based on the frequency difference between the modulator signal's carrier frequency and the local clock's frequency. A phase modulation value may be generated by scaling the adjusted local clock phase measurement. The scaling may be based on a ratio of the modulated signal's carrier frequency and the local clock's frequency. The phase correction may be based on (i) a count of periods of the modulated signal occurring between each corrected phase measurement and (ii) a difference between the carrier frequency and the local clock frequency.

An apparatus for interpolating between a first and a second signal is provided. The apparatus includes a plurality of interpolation cells coupled to a common node of the apparatus. Further, the apparatus includes a control circuit configured to supply, based on a control word, respective selection signals to each of the plurality of interpolation cells. At least one of the plurality of interpolation cells is configured to couple the common node to a first potential if the first signal and the second signal are both at a first signal level, couple the common node to a second potential, which is different from the first potential, if the first signal and the second signal are both at a second signal level, which is different from the first signal level, and to decouple the common node from at least one of the first potential and the second potential if the first signal and the second signal are at different signal levels. Additionally, the at least one of the plurality of interpolation cells is configured to switch, based on a state indicated by the respective selection signal, to coupling the common node to the second potential in response to a transition of either the leading one or the trailing one of the first signal and the second signal from the first signal level to the second signal level.

An area efficient amplifier that amplifies a continuous-time continuous-amplitude signal and converts it to a discrete-time discrete-amplitude signal. The amplifier includes a first oscillator having an input and a plurality of N outputs and a second oscillator having an input and N outputs. The amplifier includes N phase detectors, each phase detector has a first input, a second input, a first output, and a second output, where each first input of each phase detector is coupled to respective one of the N outputs of the first oscillator, where each second input of each phase detector is coupled to respective one of the N outputs of the second oscillator. The amplifier includes N quantizers, each quantizer has a data input, a clock input, and an output, where each data input of each quantizer is coupled to respective one first output or one second output of the N phase detectors.