A frequency division circuit includes a first frequency division circuit which divides a frequency of a reference signal that is generated by an oscillation circuit. An input/output terminal outputs an output signal of the first frequency division circuit for testing. A selection circuit outputs as an intermediate signal one of a first intermediate signal which is input from the input/output output terminal, and a second intermediate signal which is an output signal of the first frequency division circuit. A second frequency division circuit divides a frequency of the intermediate signal output from the selection circuit. A switching time count circuit begins counting a predetermined amount of time after the second frequency division circuit starts frequency-dividing the intermediate signal and, after elapse of the predetermined amount of time, switches the intermediate signal output from the selection circuit from the first intermediate signal to the second intermediate signal.

A frequency division circuit includes a first frequency division circuit which divides a frequency of a reference signal that is generated by an oscillation circuit. An input/output terminal outputs an output signal of the first frequency division circuit for testing. A selection circuit outputs as an intermediate signal one of a first intermediate signal which is input from the input/output output terminal, and a second intermediate signal which is an output signal of the first frequency division circuit. A second frequency division circuit divides a frequency of the intermediate signal output from the selection circuit. A switching time count circuit begins counting a predetermined amount of time after the second frequency division circuit starts frequency-dividing the intermediate signal and, after elapse of the predetermined amount of time, switches the intermediate signal output from the selection circuit from the first intermediate signal to the second intermediate signal.

The method for estimating the drift over time of a physical operating parameter of a clock for dating seismic data samples associated with a seismic data collection node involves measuring (10) at least one quantity associated with the clock, at predetermined instants or during predetermined time periods, and applying (12), to this quantity, a predetermined non-linear law of variation of this quantity that depends on the values collected during the measurement step (10), so as to obtain an estimation of the drift over time of the physical operating parameter.

The method for estimating the drift over time of a physical operating parameter of a clock for dating seismic data samples associated with a seismic data collection node involves measuring (10) at least one quantity associated with the clock, at predetermined instants or during predetermined time periods, and applying (12), to this quantity, a predetermined non-linear law of variation of this quantity that depends on the values collected during the measurement step (10), so as to obtain an estimation of the drift over time of the physical operating parameter.

A current mirror arrangement for duplex bidirectional communication between two circuit units may include in each circuit unit two identical transistors with their bases (36, 37) connected together and their bases and their collectors connected to each other respectively. Further, each of the connections between the bases and the collectors may be formed via a MOSFET. The MOSFETs of both circuit units may be connected together. More specifically, the MOSFETs' parasitic diodes of each circuit unit may be arranged in opposite directions with respect to the current system. The pair of MOSFETs in a first of the two circuit units may comprise n-channel enhancement-mode MOSFETs, and the pair of MOSFETs in a second of the two circuit units may comprise p-channel enhancement-mode MOSFETs.

An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a divided clock signal and a control signal in response to (i) an input clock signal and (ii) a configuration signal. The second circuit may be configured to generate an output clock signal in response to (i) the control signal and (ii) the divided clock signal. The second circuit may add a delay to one or more edges of the output clock signal by engaging one or more of a plurality of capacitances. A number of the capacitances engaged may be selected to reduce jitter on the output clock signal. The capacitances may be used each cycle to calibrate the output clock signal.

A seismic data collection node has a clock for dating samples of seismic data and means for estimating a drift over time of a variable physical operating parameter of the clock. According to a predetermined non-linear law of variation of the variable physical operating parameter, the instantaneous frequency varies according to a polynomial equation of order greater than or equal to 2, such that a phase of the clock varies according to a polynomial equation of order greater than or equal to 3.

A seismic data collection node has a clock for dating samples of seismic data and means for estimating a drift over time of a variable physical operating parameter of the clock. According to a predetermined non-linear law of variation of the variable physical operating parameter, the instantaneous frequency varies according to a polynomial equation of order greater than or equal to 2, such that a phase of the clock varies according to a polynomial equation of order greater than or equal to 3.

The invention relates to a watch, in particular a wristwatch, comprising an electro-optical converter, an opto-electrical converter, a light wave guide, a useful signal generating device and a watch display device. The electro-optical converter is formed to generate and feed a clocked light signal into the light wave guide. A reflector is arranged at a reflector end of the light wave guide, through which the clocked light signal is reflectable back into the light wave guide. A decoupling device is arranged at a feeding end of the light wave guide and is formed to decouple the reflected clocked light signal into the opto-electrical converter. The opto-electrical converter is formed to generate an electrical signal based on the reflected clocked light signal. The watch comprises an electrical signal path between the opto-electrical converter and the electro-optical converter, wherein the electro-optical converter is controllable for generating the clocked light signal based on the electrical signal of the opto-electrical converter. The useful signal generating device is formed to generate a useful signal based on a frequency of the electrical signal, wherein the watch display device is formed to display the time based on the useful signal.

An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a divided clock signal and a control signal in response to (i) an input clock signal and (ii) a configuration signal. The second circuit may be configured to generate an output clock signal in response to (i) the control signal and (ii) the divided clock signal. The second circuit may add a delay to one or more edges of the output clock signal by engaging one or more of a plurality of capacitances. A number of the capacitances engaged may be selected to reduce jitter on the output clock signal. The capacitances may be used each cycle to calibrate the output clock signal.