A power gating circuit includes inverters and a voltage divider sub-circuit, a latch comparator, and a gated switch sub-circuit connected to an external power supply circuit of 5V, respectively. The voltage divider sub-circuit is configured to divide a voltage of 5V and output a first voltage and a second voltage to the latch comparator and the gated switch sub-circuit, both voltage values of the first voltage and the second voltage are smaller than a withstand voltage value of a field effect transistor, and the voltage value of the first voltage is greater than that of the second voltage; the latch comparator is configured to compare two signals output by the inverters and latch a comparison result; and the gated switch sub-circuit is further connected with the latch comparator to control an output voltage, thereby improving the stability of the circuit, and extending the using life of the entire circuit.

A power gating circuit includes inverters and a voltage divider sub-circuit, a latch comparator, and a gated switch sub-circuit connected to an external power supply circuit of 5V, respectively. The voltage divider sub-circuit is configured to divide a voltage of 5V and output a first voltage and a second voltage to the latch comparator and the gated switch sub-circuit, both voltage values of the first voltage and the second voltage are smaller than a withstand voltage value of a field effect transistor, and the voltage value of the first voltage is greater than that of the second voltage; the latch comparator is configured to compare two signals output by the inverters and latch a comparison result; and the gated switch sub-circuit is further connected with the latch comparator to control an output voltage, thereby improving the stability of the circuit, and extending the using life of the entire circuit.

Provided is a reference voltage circuit including a first MOS transistor to a sixth MOS transistor, a first resistor and a second resistor, a current source circuit, and an output terminal. Five of the transistors form a differential transconductance amplifier, and an input transistor of the differential transconductance amplifier operates in the manner of weak inversion operation.

The present disclosure provides a switching current source circuit and a method for quickly establishing a switching current source. The switching current source circuit includes a first and a second switching current source branches connected in parallel with one end of a load. When the switching enable signal is switched, due to the charge coupling of the first and second switching current source branches, the bias voltage respectively generates bounce in the same direction as and a direction opposite to the transition direction of the switching enable signal. The two bounces cancel each other to make the current source bias voltage recover quickly when a toggle event happens. The present disclosure accelerates the establishment of current through the coupling of charges, and reduces the decoupling capacitance at the same time, thereby reducing the circuit area and saving the costs.

The present disclosure provides a switching current source circuit and a method for quickly establishing a switching current source. The switching current source circuit includes a first and a second switching current source branches connected in parallel with one end of a load. When the switching enable signal is switched, due to the charge coupling of the first and second switching current source branches, the bias voltage respectively generates bounce in the same direction as and a direction opposite to the transition direction of the switching enable signal. The two bounces cancel each other to make the current source bias voltage recover quickly when a toggle event happens. The present disclosure accelerates the establishment of current through the coupling of charges, and reduces the decoupling capacitance at the same time, thereby reducing the circuit area and saving the costs.

A lighting device and system having a faceplate and a backplate. The faceplate or the backplate may have an arm or a set of arms having electrical conductors to connect or couple to the electrical contact points of an outlet, plug, or switch. The operational modes may be in an emergency lighting mode and a nightlight mode. The voltage source can be connected to a light source or sensor through the control circuit or the switch, and the light source may be activated based on the output of the sensor. A controller is connected to the sensor can send or receive wireless signals through a wireless module.

A lighting device and system having a faceplate and a backplate. The faceplate or the backplate may have an arm or a set of arms having electrical conductors to connect or couple to the electrical contact points of an outlet, plug, or switch. The operational modes may be in an emergency lighting mode and a nightlight mode. The voltage source can be connected to a light source or sensor through the control circuit or the switch, and the light source may be activated based on the output of the sensor. A controller is connected to the sensor can send or receive wireless signals through a wireless module.

Operation of a charge pump is controlled to optimize power conversion efficiency by using an adiabatic mode with some operating characteristics and a non-adiabatic mode with other characteristics. The control is implemented by controlling a configurable circuit at the output of the charge pump.

Operation of a charge pump is controlled to optimize power conversion efficiency by using an adiabatic mode with some operating characteristics and a non-adiabatic mode with other characteristics. The control is implemented by controlling a configurable circuit at the output of the charge pump.

A clock source includes a comparator having a positive comparator input, a negative comparator input, a proportional to absolute temperature (PTAT) PMOS bias input, a PTAT NMOS bias input, and a comparator output, a resonator element, series and feedback resistors and other passive components coupled between the comparator output and the negative comparator input to generate a signal with approximately constant gain and frequency at the comparator output, and a PTAT bias circuit coupled to the comparator's PTAT PMOS and NMOS bias inputs, and configured to drive the PTAT PMOS bias input and the PTAT NMOS bias input to maintain approximately constant gain and frequency over the operating temperature range of the clock source.