A power supply circuit is intended to suppress power consumption when a load is not driven and to shorten a required time to be taken until a boosted voltage to be supplied to a high-side MOS transistor is stabilized when the load is changed from a deactivated state to an activated state. The power supply circuit (power supply circuit 3) supplying power to a load driving circuit (motor driving circuit 2) that drives a load by controlling a high-side MOS transistor M1 on the basis of an input load control signal includes a booster circuit (charge pump 23) configured to boost a voltage of input power and supplies the power of which the voltage is boosted as power for driving the high-side MOS transistor. The booster circuit has power supply capability which varies depending on the load control signal.

A voltage dropping apparatus may include: a voltage dropping unit receiving an input voltage, outputting the input voltage in a first mode, and dropping a level of the input voltage in a second mode; a voltage output unit connected to the voltage dropping unit, receiving and outputting the input voltage in the first mode, and receiving and outputting the dropped voltage in the second mode; and a control unit receiving a mode signal and controlling a mode change of the voltage dropping unit and the voltage output unit based on a value of the mode signal.

In accordance with aspects of the present invention, and power and timing supply is presented. The supply includes a power supply providing a supply voltage as a function of a load current; and a timing generator providing a frequency signal as a function of the supply voltage, wherein the supply voltage and the frequency signal are within a safe operating range.

In accordance with aspects of the present invention, and power and timing supply is presented. The supply includes a power supply providing a supply voltage as a function of a load current; and a timing generator providing a frequency signal as a function of the supply voltage, wherein the supply voltage and the frequency signal are within a safe operating range.

A voltage generating circuit includes a first transistor and a second transistor. Voltage of a substrate of the first transistor varies with a first parameter. The first parameter is any one of a supply voltage, an operating temperature, as well as a manufacturing process of the voltage generating circuit. A gate of the first transistor is connected to a drain of the first transistor. The substrate of the first transistor serves as an output of the voltage generating circuit. A gate of the second transistor is connected to a drain of the second transistor.

The present invention provides a current source comprising a first bias current control element, the first bias current control element being configured to generate a first current if the control value is lower than a reference value and configured to generate a second current if the control value equal to or higher than the reference value. In addition or alternatively the bias current source comprises a second bias current control element, the second bias current control element being configured to generate a third current if the control value is lower than or equal to the reference value and configured to generate a fourth current if the control value is higher than the reference value. Furthermore, the present invention provides an integrated circuit and a method.

The present invention provides a current source comprising a first bias current control element, the first bias current control element being configured to generate a first current if the control value is lower than a reference value and configured to generate a second current if the control value equal to or higher than the reference value. In addition or alternatively the bias current source comprises a second bias current control element, the second bias current control element being configured to generate a third current if the control value is lower than or equal to the reference value and configured to generate a fourth current if the control value is higher than the reference value. Furthermore, the present invention provides an integrated circuit and a method.

Over-voltage protection systems and methods are disclosed. In one aspect, a biasing circuit is added to a pre-existing clamp required by the Universal Serial Bus (USB) Type-C specification at a configuration control (CC) pin. The biasing circuit turns the pre-existing clamp into an adjustable clamp that dynamically adjusts to over-voltage conditions. In an exemplary aspect, the biasing circuit may include a biasing field effect transistor (FET) and a pair of switches that selectively couple the pre-existing clamp and the biasing FET to fixed voltages such that the CC pin is maintained at an acceptable voltage. In another exemplary aspect, the biasing circuit may omit the biasing FET and rely on two switches that selectively couple the pre-existing clamp to fixed voltages such that the CC pin is maintained at an acceptable voltage.

Modular power delivery techniques for electronic devices are described. In one embodiment, an apparatus may comprise native power delivery circuitry to source a native power delivery current, power management circuitry to control the native power delivery circuitry, a power delivery connector to mate with a counterpart power delivery connector of an external device, and a processing device conductively coupled to the power delivery connector via a supplemental power delivery line, the processing device to draw a supplemental power delivery current from the external device via the supplemental power delivery line. Other embodiments are described and claimed.

Modular power delivery techniques for electronic devices are described. In one embodiment, an apparatus may comprise native power delivery circuitry to source a native power delivery current, power management circuitry to control the native power delivery circuitry, a power delivery connector to mate with a counterpart power delivery connector of an external device, and a processing device conductively coupled to the power delivery connector via a supplemental power delivery line, the processing device to draw a supplemental power delivery current from the external device via the supplemental power delivery line. Other embodiments are described and claimed.