Patent classifications
G06F3/06
Data movement between different cell regions in non-volatile memory
According to one embodiment, a memory system includes a non-volatile memory array with a plurality of memory cells. Each memory cell is a multilevel cell to which multibit data can be written. The non-volatile memory array includes a first storage region in which the multibit data of a first bit level is written and a second storage region in which data of a second bit level less than the first bit level is written. A memory controller is configured to move pieces of data from the first storage region to the second storage region based on the number of data read requests for the pieces of data received over a period of time or on external information received from a host device that sends read requests.
Broadside random access memory for low cycle memory access and additional functions
A computational system includes one or more processors. Each processor has multiple registers, as well attached memory to hold instructions. The processor is coupled to one or more broadside interfaces. A broadside interface allows the processor to load or store an entire widget state in a single clock cycle of the processor. The broadside interface also allows the processor to move and store 32 bytes of information into RAM in less than four to five clock cycles of the processor while the processor concurrently performs one or more mathematical operations on the information while the move and store operation is taking place.
Method and system for processing commands in storage devices to improve quality of service
Operation of a non-volatile memory (NVM) storage module may comprise receiving a plurality of commands as associated with a plurality of priority-based queues from a host-memory. A received command is evaluated in accordance with a priority associated with the queue storing the command and a size of the command. The evaluated command is split into a plurality of sub-commands, each of the sub-commands having a size determined in accordance with the evaluation. A predetermined number of hardware resources are allocated for each of the evaluated command based on at least the size of each of the sub-commands to thereby enable a processing of the evaluated command based on the allocated resources. Quality of service (QoS) for the evaluated-command may thus be augmented.
Data loss prevention
Techniques for providing data loss prevention, including data exfiltration prevention and crypto-ransomware prevention, are provided. In some embodiments, a slack-space file system is created by using a modified packing algorithm to increase and/or optimize an amount of slack space created by files stored in a standard file system. A program for accessing and indexing the slack-space file system may be stored, and requests by a user to store data on a storage medium of a computer system may cause the information to be stored in the slack-space file system, where it may be protected from destructive malware that operates solely on the standard file system. In some embodiments, sensitive information may be hidden by storing the information in an alternate data stream of a file and by replacing the information in the unnamed data stream of the file with non-sensitive information that may appear to be sensitive.
Storage system communication
A method for authorizing I/O (input/output) commands in a storage cluster is provided. The method includes generating a token responsive to an authority initiating an I/O command, wherein the token is specific to assignment of the authority and a storage node of the storage cluster. The method includes verifying the I/O command using the token, wherein the token includes a signature confirming validity of the token and wherein the token is revocable.
Object memory data flow triggers
Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. More specifically, embodiments of the present invention are directed to an instruction set of an object memory fabric. This object memory fabric instruction set can include trigger instructions defined in metadata for a particular memory object. Each trigger instruction can comprise a single instruction and action based on reference to a specific object to initiate or perform defined actions such as pre-fetching other objects or executing a trigger program.
Extended super memory blocks in memory systems
Embodiments of the present disclosure relate to a memory system and an operating method of the memory system. According to embodiments of the present disclosure, a memory system may divide and manage the plurality of memory dies into a plurality of memory die groups, may set a first super memory block including at least one of memory blocks included in a first memory die group, and a second super memory block including at least one of memory blocks included in a second memory die group, may determine whether to set an extended super memory block in which all or part of the first super memory block and all or part of the second super memory block are merged, and may write a write data to the extended super memory block in an interleaving manner when writing the write data requested by a host.
Method and apparatus for storage device latency/bandwidth self monitoring
A storage device is described. The storage device may store data in a storage memory, and may have a host interface to manage communications between the storage device and a host machine. The storage device may also include a translation layer to translate addresses between the host machine and the storage memory, and a storage interface to access data from the storage memory. An in-storage monitoring engine may determine characteristics of the storage device, such as latency, bandwidth, and retention.
Systems and methods for efficient data buffering
In one embodiment, a system may include a memory unit, a first processing unit configured to write data into a memory region of the memory unit, a second processing unit configured to read data from the memory region, a first control unit configured to control the first processing unit's access to the memory unit and, and a second control unit configured to control the second processing unit's access to the memory unit. The first control unit may be configured to obtain, from the second control unit, a first memory address associated with a data reading process of the second processing unit, receive a write request from the first processing unit, the read request having an associated second memory address, and write data into the memory region based on the write request in response to a determination that the second memory address falls outside of the guarded reading region.
Data storage device restoring method
A data storage device restoring method is provided, which is adapted to a data storage device. The data storage device includes an SSD controller, a power management circuit, a non-volatile memory, and a reset circuit. The data storage device restoring method includes: the power management circuit determines whether a normal signal from the SSD controller is received within a predetermined time; if not, the power management circuit resupplies power to the data storage device but stops supplying power to the non-volatile memory, thereby the SSD controller stays in a read-only memory mode to automatically execute the data storage device restoring process.