G06F5/06

Operating a FIFO memory

The present invention concerns a method of operating a first-in first-out memory (9) arranged to store measurement data samples measured by a plurality of data measurement sensors (1, 3, 5), which can operate at various sampling rates. The oldest measurement data sample in the memory (9) is arranged to be read first before the newer measurement data samples. The method comprises: receiving measurement data samples from at least two data measurement sensors (1, 3, 5); and saving the received measurement data samples in the memory (9). Each of the measurement data samples saved in the memory is associated with a tag which is also saved in the memory (9) and which identifies the data measurement sensor (1, 3, 5) which measured the respective measurement data sample.

Autonomous trading with memory enabled neural network learning

A computer-implemented method is provided for autonomously making continuous trading decisions for assets using a first eligibility trace enabled Neural Network (NN). The method includes pretraining the first eligibility trace enabled NN, using asset price time series data, to generation predictions of future asset price time series data. The method further includes initializing a second eligibility trace enabled NN for reinforcement learning using learned parameters of the first eligibility trace enabled NN. The method also includes augmenting state information of the second eligibility trace enabled NN for reinforcement learning using an output from the first eligibility trace enabled NN. The method additionally includes performing continuous actions for trading assets at each of multiple time points.

Autonomous trading with memory enabled neural network learning

A computer-implemented method is provided for autonomously making continuous trading decisions for assets using a first eligibility trace enabled Neural Network (NN). The method includes pretraining the first eligibility trace enabled NN, using asset price time series data, to generation predictions of future asset price time series data. The method further includes initializing a second eligibility trace enabled NN for reinforcement learning using learned parameters of the first eligibility trace enabled NN. The method also includes augmenting state information of the second eligibility trace enabled NN for reinforcement learning using an output from the first eligibility trace enabled NN. The method additionally includes performing continuous actions for trading assets at each of multiple time points.

Apparatuses with an embedded combination logic circuit for high speed operations
09762247 · 2017-09-12 · ·

Apparatuses for performing combination logic operations with an combination logic circuit are disclosed. According to one embodiment, the apparatus comprises a first-in-first-out stage comprising an combination logic circuit, a input ring counter circuit coupled to the first-in-first-out stage and configured to selectively provide a push signal to the first-in-first-out stage, and a output ring counter circuit coupled to the first-in-first-out stage and configured to selectively provide a pop signal to the first-in-first-out stage, wherein the first-in-first-out stage is configured to perform calculations on input data with the combination logic circuit to generate output data responsive to receiving the push signal and to provide the output data based on the calculations responsive to receiving the pop signal.

Discrete time loop based thermal control

In an embodiment, a circuit includes: an error amplifier; a temperature sensor, wherein the temperature sensor is coupled to the error amplifier; a discrete time controller coupled to the error amplifier, wherein the discrete time controller comprises digital circuitry; a multiple bits quantizer coupled to the discrete time controller, wherein the multiple bits quantizer produces a digital code output; and a heating array coupled to the multiple bits quantizer, wherein the heating array is configured to generate heat based on the digital code output.

Asynchronous FIFO circuit
11205463 · 2021-12-21 · ·

An asynchronous FIFO circuit of the present invention generates a write clock and a read clock from the same input clock, and generates a write control signal in synchronization with the write clock and a read control signal in synchronization with the read clock. The asynchronous FIFO circuit includes a data read-write unit having a plurality of data holding units. The data read-write unit writes data into one of the data holding units for each write clock on the basis of the write control signal, and reads data from one of the data holding units for each read clock on the basis of the read control signal.

TECHNIQUES FOR TRANSFERRING DATA WITHIN AND BETWEEN COMPUTING ENVIRONMENTS

Various embodiments are generally directed to techniques for transferring data within and between computing environments with a text interaction system (TIS), such as by identifying and classifying objects of interest in target data, for instance. Some embodiments are particularly directed to projecting a use and/or destination for text copied to a clipboard datastore. Various embodiments are directed to identifying relevant text in selection input. Many embodiments are directed to utilizing contextual data for one or more of determining objects of interest, classifying objects of interest, and determining output to provide via a graphical user interface (GUI).

TECHNIQUES FOR TRANSFERRING DATA WITHIN AND BETWEEN COMPUTING ENVIRONMENTS

Various embodiments are generally directed to techniques for transferring data within and between computing environments with a text interaction system (TIS), such as by identifying and classifying objects of interest in target data, for instance. Some embodiments are particularly directed to projecting a use and/or destination for text copied to a clipboard datastore. Various embodiments are directed to identifying relevant text in selection input. Many embodiments are directed to utilizing contextual data for one or more of determining objects of interest, classifying objects of interest, and determining output to provide via a graphical user interface (GUI).

Power management of re-driver devices

An apparatus, such as a re-driver, can include a receiver port coupled to a first link partner across a first link; a transmitter port coupled to a second link partner across a second link; and a power management (PM) controller implemented in hardware. The PM controller can detect a PM control signal, determine a PM state for the apparatus based on the PM control signal, and cause the apparatus to enter the PM state. The apparatus can transmit electrical signals to the second link partner based on the PM state. The PM management control signal can include a clock request, an electrical idle, a common mode voltage, or other electrical signal indicative of a PM link state change of a link partner coupled to the re-driver.

Power management of re-driver devices

An apparatus, such as a re-driver, can include a receiver port coupled to a first link partner across a first link; a transmitter port coupled to a second link partner across a second link; and a power management (PM) controller implemented in hardware. The PM controller can detect a PM control signal, determine a PM state for the apparatus based on the PM control signal, and cause the apparatus to enter the PM state. The apparatus can transmit electrical signals to the second link partner based on the PM state. The PM management control signal can include a clock request, an electrical idle, a common mode voltage, or other electrical signal indicative of a PM link state change of a link partner coupled to the re-driver.