G06F2115/12

AUTOMATED REDISTRIBUTION LAYER POWER CONNECTIONS

A system and method for automatically generating layout masks of power rails within redistribution layers of a semiconductor package are described. In various implementations, a user defines attributes to use for automatic power rail generation in the redistribution layers. The circuitry of a processor of a computing device used by the user executes instructions of a redistribution layer (RDL) automated power rail generator, which is referred to as the power rail generator. The power rail generator uses the attributes and a copy of the RDL netlist of the signal routes within the RDL to generate RDL mask layout data representing the signal routes of the power rails within the RDL. The processor generates the power rails for a significantly large number of signal routes in the RDL based on the received data such as the attributes that allow the user to customize the automatic generation.

Methods and systems for product failure prediction based on X-ray image re-examination

In one embodiment, an X-ray inspection system may access a first set of X-ray images of one or more first samples that are labeled as being non-conforming. The system may adjust a classification algorithm based on the first set of X-ray images. The classification algorithm may classify samples into conforming or non-conforming categories based on an analysis of corresponding X-ray images. The system may analyze a second set of X-ray images of a number of second samples using the adjusted classification algorithm. The second samples may be previously inspected samples that have been classified as conforming by the classification algorithm during a previous analysis before the classification algorithm is adjusted. The system may identify one or more of the second samples from the second set of X-ray images. Each identified second sample may be classified as non-conforming by the adjusted classification algorithm.

REINFORCEMENT LEARNING APPARATUS AND METHOD BASED ON USER LEARNING ENVIRONMENT

Disclosed is a user learning environment-based reinforcement learning apparatus and method. According to the disclosure, a CAD data based-reinforcement learning environment may be easily set by a user using a user interface (UI) and a drag and drop, a reinforcement learning environment may be promptly configured, and reinforcement learning may be performed based on the learning environment set by the user, and thus the optimized location of a target object may be automatically produced in various environments.

REINFORCEMENT LEARNING APPARATUS AND REINFORCEMENT LEARNING METHOD FOR OPTIMIZING POSITION OF OBJECT BASED ON DESIGN DATA

Disclosed are a reinforcement learning apparatus and a reinforcement learning method for optimizing the position of an object based on design data. The present disclosure may configure a learning environment based on design data of a user and generate the optimal position of a target object, installed around a specific object during a design or manufacturing process, through reinforcement learning using simulation.

System interconnect architecture using dynamic bitwise switch and low-latency input/output

Embodiments disclosed herein describe switching logic in board-level interconnects and in the system-level interconnects that may provide bitwise dynamic routing and switching between corresponding board-level and system-level components. At board-level, a switching ASIC may receive input data through a backplane from an emulation ASIC in a first logic board and route any bit of the input data to any of the emulation ASIC in a second logic board. At system-level, a switching logic board containing a set of switching ASICs may be associated with a logic cluster and may dynamically route data bits from the emulation ASICs in the logic cluster to emulation ASICs to other logic clusters of the emulation system and/or target systems. Additionally, the switching logic board may dynamically route bits from the other logic clusters to the associated logic cluster.

Method, system, and electronic device for detecting open/short circuit of PCB design layout

A method for detecting an open/short circuit on a PCB design layout includes: reading PCB data of a to-be-checked PCB design layout, to output an image of each PCB layer included in the PCB design layout; performing a first connectivity analysis on the image of each PCB layer to classify pad patterns connected with each other in the same layer into a corresponding child network group; performing a second connectivity analysis to classify child network groups in which pad patterns connected by the same electroplated hole, into a corresponding parent network group; reading IPC netlist data of the PCB design layout, to obtain a netlist network group in which each pad pattern is; and determining whether a netlist network relationship of the pad patterns is consistent with a network relationship obtained after the second connectivity analysis in order to determine whether there is an open/short circuit.

Excitation source planning method for electrical simulation and system thereof

An excitation source planning method for an electrical stimulation is proposed to plan an excitation source. A layout importing step is performed to drive a processing unit to import a PCB layout to an electromagnetic simulation software module. A port establishing step is performed to set the excitation source to be vertically disposed between a signal layer and a main ground layer. A model generating step is performed to perform the electrical simulation according to the excitation source to generate a three-dimensional simulation model corresponding to the PCB layout. When the signal layer is not electrically connected to the main ground layer, the electromagnetic simulation software module executes an extending step. The extending step is performed to provide a first metal unit to be connected to the signal layer, and reset the excitation source to be vertically disposed between the first metal unit and the main ground layer.

System and method for autonomous printed circuit board design using machine learning techniques

The present disclosure relates to systems and methods for floorplanning using machine learning techniques. Embodiments may include receiving an electronic design and analyzing the electronic design using a reinforcement learning agent. Embodiments may further include recommending a first action wherein the first action includes at least one of a place agent action, a via agent action, or a route agent action. Embodiments may also include updating the electronic design based upon, at least in part, the first action to generate an updated electronic design. Embodiments may further include analyzing the updated electronic design using the reinforcement learning agent and recommending a second action wherein the second action includes at least one of a place agent action, a via agent action, or a route agent action. Embodiments may also include updating the updated electronic design based upon the second action to generate a second updated electronic design.

Perceptible Indicators That Wires are Attached Correctly to Controller
20230120713 · 2023-04-20 ·

Tools and techniques are described to automate line testing when wiring devices (such as equipment and sensors) to controllers. Controllers have access to databases of the devices that are controlled by them, including wiring diagrams and protocols, such that the controller can automatically check that each wire responds correctly to stimulus from the controller. After testing, a reporting device rapidly shows the results of the line testing.

BOARD DESIGN ASSISTANCE DEVICE, BOARD DESIGN ASSISTANCE METHOD, AND RECORDING MEDIUM

A board design assistance device includes a design data acquirer to acquire design data for a printed circuit board, a first determiner to determine, based on the design data for the printed circuit board, whether a lengthwise direction of board fiber in the printed circuit board is perpendicular to a longitudinal direction of an electronic component mounted on the printed circuit board, a second determiner to determine, based on the design data for the printed circuit board, whether a wire is routed crosswise from a pad receiving the electronic component mounted on the printed circuit board, and a notifier to provide a notification including error information specifying an electronic component determined to have a longitudinal direction not perpendicular to the lengthwise direction of the board fiber and determined to be connected to a pad from which a wire is not routed crosswise.