Provided is a hardware in the loop simulation (HILS) module comprising an electronic control unit (ECU), a storage configured to store software in the loop simulation (SILS) software comprising a virtual ECU, and a controller configured to control at least one of the HILS module or the SILS software to perform a simulation on a network comprising at least one of the ECU or the virtual ECU.

Systems or methods of the present disclosure may provide efficient circuit implementation on processing circuitry. The processing circuitry may include a processor, a programmable hardware, or both. The systems and methods may include determining and removing unused and/or redundant portions of predefined software and hardware description instructions before implementing associated circuitry. The implemented circuitry may perform various functions including parsing, pipelining, deparsing, temporary storage and combining, math operations, or a combination thereof, among other things.

A method for testing platforms (e.g., live, virtual, and/or constructive platforms associated with autonomous aircraft systems and their component subsystems) in a live/virtual/constructive (LVC) environment. In embodiments, the method includes determining, via a testbed engine, the development state of a platform component under test. The method includes retrieving a test to be executed, the test including test conditions to be applied to the component. The method includes determining whether the component is enabled to respond to the test conditions. The method includes, if the component is enabled to respond to the test conditions, executing the test while monitoring the component to detect a first output response and a second output response. The method includes identifying, via the testbed engine, at least one change in the development state of the component by comparing the first and second output responses.

Methods and apparatus for performing profile-guided optimization of integrated circuit hardware are provided. Circuit design tools may receive a source code and compile the source code to generate a hardware description. The hardware description may include profiling blocks configured to measure useful information required for optimization. The hardware description may then be simulated to gather profiling data. The circuit design tools may then analyze the gathered profiling data to identify additional opportunities for hardware optimization. The source code may then be modified based on the analysis of the profiling data to produce a smaller and faster hardware that is better suited to the application.

An electronic control unit (ECU) for transmitting large data in a hardware-in-the-loop (HiL) simulation environment, a system including the same and a method thereof are provided. The electronic control unit for executing a HiL simulation includes an interface transmitting/receiving data associated with a simulation in link with a hardware-in-the-loop (HiL) simulator, a data storing unit storing data generated by executing the simulation, and a transmission agent fragmenting the stored data into multiple data and transmitting the multiple data and transmitting one data segment according to a fragmented order whenever repeatedly executing the simulation.

A method is provided for simulating a program executable by a processor and a circuit design configured to communicate with the processor. A processor on a programmable IC is configured to execute the program. Programmable resources on the programmable IC are configured to implement a plurality of interface circuits. Each of the interface circuits is configured to communicate data between the processor and a simulation environment using a respective communication protocol. The interface circuits that uses a communication protocol used by the circuit design is enabled and other ones of the interface circuits are disabled. The circuit design is simulated in a simulation environment coupled to the programmable IC. During the simulating, the program is executed on the processor and data is communicated between the processor and the computing platform using the determined one of the plurality of interface circuits.

A system and method for designing and manufacturing products are provided. A system and method may include receiving one or more characteristics of a product; automatically selecting, based on the characteristics, one or more physical components to be included in the product; automatically defining a firmware module configured to interface with the selected physical modules; and automatically generating a set of manufacturing specifications usable for manufacturing the product, wherein the product includes the selected physical components and the firmware module.

A method for simulating operation of a system. The method accesses information characterizes system behavior, identifies system components and characterizes component behavior and relationships. The components include composite or non-composite unit types. A user selects an instance root and the method induces an instance hierarchy from that root. The instance hierarchy is displayed on a GUI in the form of a navigable tree or breadcrumbs view. Operation of the system is simulated using the instance hierarchy. Embodiments further include the concepts of merging certain variable names, displaying producing and consuming downstream and upstream elements, positioning, rotating, or orienting diagram elements to avoid overlapping with other diagram elements, identifying statically constant variables and propagating constness to producer and consumer variables, storing simulation results in compressed form and decompressing as needed, and identifying differences between dataflow diagrams.

A method for supporting a configuration of an interface is provided, wherein the configuration environment has an overview region that has several subregions. At least one item of information concerning a part of the configuration is displayed in each subregion. For each subregion, an item of information concerning the part of the configuration associated with the subregion is displayed. In the case of a warning and/or error message, a configuration option is displayed so as to be selectable, via which the warning/error message is resolved. The selection of the displayed configuration option causes a functionality to be started via which the displayed configuration option is made possible. In the case of a change in the status of a subregion, the display of the status and/or warning and/or error message and a configuration option derived therefrom in one subregion or several subregions is automatically updated and adapted to the changed status.

Systems and methods are described for controlling or monitoring a wide variety of target hardware, which may use various interfaces and protocols, via non-customized software, without requiring additional software to interface between the non-customized software and the target hardware. An application repository can include a variety of software applications available to end users. An end user may request one or more such applications, and specify target hardware controlled or monitored by the applications. The app repository can then generate a hardware configuration template, corresponding to a configuration of a field-programmable hardware layer on a bridge device of the end user, which routes data between inputs and outputs of the target hardware and a memory on the bridge device. The template and applications can then be provisioned on the bridge device, such that the applications can execute to control and monitor the target hardware via interaction with the memory.