A system for data driven diagnostics of a machine including a machine learning model instantiated in a computer, the machine learning model being configured to: receive operational data of the machine; and process the operational data to determine machine diagnostics information. The machine learning model is trained using simulated defect information received from a simulation environment.

A method for generating an augmented reliability performance model for a product includes obtaining a reliability performance model for the product, developing a reliability prediction machine learning model for predicting reliability performance of the product based on data obtained from manufacturing and testing of the product, and obtaining, from development of the machine learning model, feature names for the machine learning model and their predictive power values. The feature names may correspond to features from the data obtained from manufacturing and testing of the product. The method may further include extracting a set of feature names corresponding to features having highest predictive power values from the feature names, and generating the augmented reliability performance model for the product by modifying the reliability performance model to incorporate model parameters derived from the set of feature names.

An apparatus reads a chip design comprising first and second blocks corresponding to first and second hardware modules, nodes, and data path segments that each connect a pair of nodes or a node to a block. Tracing backward along data paths that terminate at the second block, the apparatus identifies a secure cone. The secure cone comprises secure path segments of the data paths terminating at the second block and corresponding nodes. The apparatus identifies data paths originating at the first block and that are at least partially within the secure cone and determines whether any terminate outside the secure cone. When none of the data paths originating at the first block terminate outside the secure cone, the apparatus verifies the chip design. When a data path originating at the first block terminates outside the secure cone, the apparatus determines that the chip design has a potential leak.

A computing device includes a processor and a storage device. A wafer asset modeling module is stored in the storage device and is executed by the processor to configure the computing device to perform acts identifying and clustering a plurality of assets based on static properties of a wafer asset using a first module of the wafer asset modeling module. The clustered plurality of assets is determined based on dynamic properties of the wafer asset using a second module of the wafer asset modeling module. Event prediction is performed by converting a numeric data of the clustered plurality of assets to a natural language processing (NLP) domain by a third module of the wafer asset modeling module. One or more sequence-to-sequence methods are performed to predict a malfunction of a component of the wafer asset and/or an event based on past patterns. Prediction information is stored in the storage device.

In some examples, a method for determining weldable and unweldable portions of a seam comprises receiving a representation of a part including the seam. The method also includes discretizing a representation of the seam into a plurality of waypoints. The method also includes evaluating each waypoint from the plurality of waypoints for feasibility of welding. The method further includes generating a weld path through at least a subset of the plurality of waypoints in accordance with the feasibility of welding.

A method for use in a computing device, comprising: obtaining a pooling plan, the pooling plan identifying a respective pooling warehouse for at least a first article; receiving a first data set that identifies one or more second articles that can be substituted with the first article; receiving a second data set that identifies: (i) local demand for the first article at the pooling warehouse, (ii) local demand for the first article at one or more unplanned warehouses for the first article, and (iii) local demand for the second articles at one or more unplanned warehouses for the second articles; calculating an efficiency score for the pooling plan by evaluating a model for gauging an efficiency of the pooling plan, the model being evaluated based on the pooling plan, the first data set, and the second data set.

Disclosed herein is a single integrated circuit chip including main logic that operates a vehicle component such as a valve driver. Isolated from the main logic within the chip is a safety area that operates to verify proper operation of the main logic. A checker circuit within the chip outside of the safety area serves to verify proper operation of the checker circuit. The checker circuit receives signals from the safety circuit and uses combinatorial logic circuit to verify from those signals that the check circuit is operating properly.

A method of fabricating a semiconductor device includes forming a semiconductor substrate having a first protected circuit, and forming a first guard ring around the first protected circuit including: forming a first wall configured to provide a first reference voltage; and forming a second wall configured to provide a second reference voltage different than the first reference voltage.

A calibration method for emulating a Group III-V semiconductor device, a method for determining trap location within a Group III-V semiconductor device and method for manufacturing a Group III-V semiconductor device are provided. Actual tape-out is performed according to an actual process flow of the Group III-V semiconductor device for manufacturing the Group III-V semiconductor devices and PCM Group III-V semiconductor device. Actual electrical performances of the Group III-V semiconductor devices and the PCM Group III-V semiconductor device are obtained and the actual electrical performances of the Group III-V semiconductor devices and the PCM Group III-V semiconductor device are compared to determine locations where one or more traps appear.

This invention relates to a robust optimal design method for photovoltaic cells. Firstly, the deterministic optimal model is established, which is solved by Monte Carlo method to obtain the maximum output power value of optimization objective and its corresponding design variable value, and then the design variable value obtained from deterministic optimization is deemed as the initial point of the mean value of the robust optimal design variable. Later, the robust optimal model is solved by Monte Carlo method in order to obtain the mean value of design variable, and then appropriate materials and manufacturing techniques are selected for corresponding photovoltaic components according to the design variable obtained, so as to achieve the robust optimal design of photovoltaic cells. In fact, this invention improves the output stability and reliability of photovoltaic cells.