Patent classifications
G06F2119/06
Method and system for determining solar access of a structure
Methods and systems are disclosed that automatically determine solar access values. In one implementation, a 3D geo-referenced model of a structure is retrieved in which geographic location on the earth of points in the 3D geo-referenced model are stored or associated with points in the 3D geo-referenced model. Object point cloud data indicative of object(s) that cast shade on the structure is retrieved. The object point cloud data may be generated from one or more georeferenced images and the object point cloud data is indicative of an actual size, shape, and location of the object(s) on the earth. The structure in the 3D geo-referenced model is divided into one or more sections, which are divided into one or more areas, each area having at least three vertices. Then, a solar access value for the particular vertex is determined.
Circuit design assistance system and computer readable medium
A detection unit (231) detects, based on synthesis result data obtained by logic synthesis on design data of a target circuit, a predicted place where a glitch is predicted to occur in the target circuit. An insertion unit (232) inserts a glitch removal circuit in an output side of the predicted place by making a change to at least one of the synthesis result data and the design data.
SIMULATION SYSTEM AND METHOD THEREOF
A simulation system and a method thereof are disclosed. In the simulation system, a system power transmission model, and analog current time-domain model and digital current time-domain model are connected to obtain power noise generated after a supply current is obtained; jitter time-domain information of each interface connection circuit model under the power noise is obtained based on transmission of a clock signal outputted from a phase lock loop, by a simulation program; next, a voltage step response of a voltage measurement point when a clock terminal of each interface connection circuit model receives an ideal signal, is simulated by the simulation program to generate a first voltage time-domain model; a system waveform is generated based on the jitter time-domain information of each interface connection circuit model under the power noise, the first voltage time-domain model and data transmission, thereby obtaining an eye diagram and time-domain jitter distribution.
Circuit health state prediction method and system based on integrated deep neural network
A circuit health state prediction method and system based on an integrated deep neural network are provided and relates to a technique for predicting a power electronic circuit failure. The invention serves to identify and diagnose a health state of a simulation circuit based on historical data by using an integrated deep neural network, and the method includes: carrying out parameter aging simulation experiments for different devices; extracting a series of time domain features of output signals through a temporal transformation method, and establishing health indices of the devices based on an improved angular similarity; predicting a health state of the simulation circuit in degeneration by using CAE and LSTM-RNN; and predicting validity of the circuit health state prediction method by referring to relevant evaluation indices. The invention is capable of effectively predicting the health state of the simulation circuit and is highly accurate and easy to implement.
SYSTEMS AND METHODS OF ESTIMATING THERMAL PROPERTIES OF SEMICONDUCTOR DEVICES
A method includes: receiving a layout of an integrated circuit; identifying, based on the layout, at least a first net and at least a second net, wherein the first net extends through the integrated circuit along a vertical direction, and the second net terminates at a middle portion of the integrated circuit along the vertical direction; dividing the integrated circuit into a plurality of grid units, wherein he first net is constituted by a first subset of the plurality of grid units, and the second net is constituted by a second subset of the plurality of grid units; estimating a first thermal conductivity of each of the first subsets of grid units; estimating a second thermal conductivity of each of the second subsets of grid units; and estimating an equivalent thermal conductivity of the integrated circuit based on combining the first thermal conductivity and the second thermal conductivity.
Ferrule-less fiber optic connector with re-coat layer to protect buckling portion of optical fiber
The present disclosure relates to using a coating to protect a portion of an optical fiber that is intended to buckle within a fiber optic connector. The fiber optic connector can include a bare fiber optical connector.
Automated network-on-chip design
Various examples are provided related to automated chip design, such as a pareto-optimization framework for automated network-on-chip design. In one example, a method for network-on-chip (NoC) design includes determining network performance for a defined NoC configuration comprising a plurality of n routers interconnected through a plurality of intermediate links; comparing the network performance of the defined NoC configuration to at least one performance objective; and determining, in response to the comparison, a revised NoC configuration based upon iterative optimization of the at least one performance objective through adjustment of link allocation between the plurality of n routers. In another example, a method comprises determining a revised NoC configuration based upon iterative optimization of at least one performance objective through adjustment of a first number of routers to obtain a second number of routers and through adjustment of link allocation between the second number of routers.
SIMULATION OF GAS DYNAMICS OF DIFFERENT GAS CHANNEL GEOMETRIES IN FUEL CELLS
Systems and methods for simulating gas flow dynamics of a real hydrogen fuel cell system using a computer, wherein the real hydrogen fuel cell system includes a gas container volume network having gas container volumes interconnected by gas transport lines. The method includes defining volume element and flow channel classes, defining a plurality of volume instances and a plurality of flow channel instances, for each flow channel instance, creating a first interconnection representation that defines a source container volume and a destination container volume for the flow channel instance, wherein the first interconnection representation mimics a portion of the gas container volume network of the real hydrogen fuel cell system, and simulating, using the first interconnection representation, a thermodynamic state for each of the volume instances, the thermodynamic state representing thermodynamic parameter(s) in each container volume of the gas container volume network of the real hydrogen fuel cell system.
MACHINE-LEARNING-BASED POWER/GROUND (P/G) VIA REMOVAL
A method, a system, and non-transitory computer readable medium for power and ground (P/G) routing for an integrated circuit (IC) design are provided. The method includes generating input features for a machine-learning (ML) model based on IR drop and routing congestion analysis for a P/G network for the IC design, and modifying a set of P/G vias or a set of P/G wires in the P/G network according to modifications identified by the ML model. The ML model comprises a feature extractor pre-trained using a plurality of images of P/G vias and P/G wires.
DEVICE MISMATCH MITIGATION FOR MEDIUM RANGE AND BEYOND DISTANCES
A structure is provided that includes a first active circuit in which at least one of areas surrounding the first active circuit includes an active circuit-containing region. A second active circuit is spaced apart from the first active circuit. The second active circuit includes a circuit mimic fill area present in at least one of the areas surrounding the second active circuit. The circuit mimic fill area substantially matches the active circuit-containing region that is adjacent to the first active circuit. The circuit mimic fill area is located on an equivalent side of the second active circuit as the active circuit-containing region that is present adjacent the first active circuit. The use of the circuit mimic fill mitigates the effects over medium range and beyond distances that cause device failure.