A processing system tags read and write transaction packets that are functionally safe and suppresses redundant processing and error checking for functionally safe tagged transaction packets. The processing system includes compute elements that are interconnected via an interconnect fabric that includes resources to route operations. The interconnect fabric includes redundant resources to execute the same routing operations and comparator elements to indicate an error in response to detecting a mismatch between the output of a resource and its corresponding duplicate resource. The interconnect fabric selectively activates the duplicate resources and comparator elements in response to a tag associated with a transaction packet indicating that the transaction packet is safety-critical.

A plurality of storage nodes in a single chassis is provided. The plurality of storage nodes in the single chassis is configured to communicate together as a storage cluster. Each of the plurality of storage nodes includes nonvolatile solid-state memory for user data storage. The plurality of storage nodes is configured to distribute the user data and metadata associated with the user data throughout the plurality of storage nodes such that the plurality of storage nodes maintain the ability to read the user data, using erasure coding, despite a loss of two of the plurality of storage nodes. A plurality of compute nodes is included in the single chassis, each of the plurality of compute nodes is configured to communicate with the plurality of storage nodes. A method for accessing user data in a plurality of storage nodes having nonvolatile solid-state memory is also provided.

An apparatus has a processing pipeline (2) comprising an execute stage (30) and at least one front end stage (10), (20), for controlling which micro operations are issued to the execute stage. The pipeline has an intra-core lockstep mode of operation in which the at least one front end stage (10), (20), (25) issues micro operations for controlling the execute stage (30) to perform main processing and checker processing. The checker processing comprises redundant operations corresponding to associated main operations of at least part of the main processing. Error handling circuitry (200), (210) is responsive to the detection of a mismatch between information associated with given checker and main operations to trigger a recovery operation to correct an error and continue forward progress of the main processing.

A multi-processor neural network processing apparatus comprises: a plurality of network processing engines, each for processing one or more layers of a neural network according to a network configuration. A memory at least temporarily stores network configuration information, input image information, intermediate image information and output information for the network processing engines. At least one of the network processing engines is configured, when otherwise idle, to identify configuration information and input image information to be processed by another target network processing engine and to use the configuration information and input image information to replicate the processing of the target network processing engine. The apparatus is configured to compare at least one portion of information output by the target network processing engine with corresponding information generated by the network processing engine to determine if either the target network processing engine or the network processing engine is operating correctly.

A graphics processing system for performing tile-based rendering of a scene that includes safety-critical elements. The graphics processing system includes a geometry engine configured to, in a geometry processing phase, identify protected tiles that include safety-critical elements; a fragment processing engine configured to, in a fragment processing phase, process each of the protected tiles first and second times so as to, respectively, generate first and second fragment-processed outputs; and a check unit configured to, for each of the protected tiles, compare the first and second fragment-processed outputs and raise a fault signal if the first and second fragment-processed outputs do not match.

A plurality of storage nodes in a single chassis is provided. The plurality of storage nodes in the single chassis is configured to communicate together as a storage cluster. Each of the plurality of storage nodes includes nonvolatile solid-state memory for user data storage. The plurality of storage nodes is configured to distribute the user data and metadata associated with the user data throughout the plurality of storage nodes such that the plurality of storage nodes maintain the ability to read the user data, using erasure coding, despite a loss of two of the plurality of storage nodes. A plurality of compute nodes is included in the single chassis, each of the plurality of compute nodes is configured to communicate with the plurality of storage nodes. A method for accessing user data in a plurality of storage nodes having nonvolatile solid-state memory is also provided.

A multi-core processor having a first operation mode in which processors perform the same task and a second operation mode in which the processors perform different tasks includes first and second processors configured to write an operation mode value to a first register or second register when a function called in executed software requests the first or second operation mode, a manager configured to assign core IDs of the first and second processors according to the operation mode value stored in the first register or second register, and a reset controller configured to reset the first and second processors in response to the function, wherein the manager assigns the same core ID to the first and second processors when the operation mode value indicates the first operation mode, and allocates different core IDs to the first and second processors when the operation mode value indicates the second operation mode.

Techniques to backup collaboration server data are disclosed. A plurality of separate threads are used to back up a prescribed number of subsets of a dataset. Each subset of the prescribed number of subsets was determined by walking an associated directory in the prescribed order at a prior time with which a prior backup is associated. A separate thread is spawned to backup transaction logs associated with the dataset. A first pass backup of the transaction logs is performed in parallel with the backup of the prescribed number of subsets.

The invention present disclosure relates to a control device for redundant execution of an operating function, wherein the control device comprises at least a first processor unit and a second processor unit and a plurality of peripheral units and a first switching unit is provided for the first processor unit and a second switching unit is provided for the second processor unit, and wherein the control device is designed in a first operating mode to execute the operating function by means of the first processor unit and in the meantime to execute a predetermined auxiliary function by means of the second processor unit. According to the invention, the control device is designed, in a second operating mode to execute the operating function by means of the second processor unit, and in so doing to continue to execute the auxiliary function (24) in a predefined reduced scope by means of the second processor unit, wherein a coupling device is provided, which is designed to connect the second processor unit to the first switching unit.

A method for managing data transfer for a plurality of processors. Transfer messages exchanged between processor units and an external node in an integrity manager located in hardware in communication with the processor units and the external node are received. An exchange of the transfer messages is managed by the processor units with the external node based on a selected mode in mixed integrity modes such that redundantly calculated outputs from the processor units in a high integrity mode match.