According to one embodiment, a magnetic disk device includes a control device and a regulator device. The control device and the regulator device are connected to each other through a first interface and a second interface. The control device transmits a required voltage value to the regulator device through the first interface and transmits a correction value based on the required voltage value and an output voltage output from the regulator device to the regulator device. The regulator device outputs a voltage to the control device on the basis of the received required voltage value and corrects a value of the voltage to be output to the control device on the basis of the received correction value.

An electromagnetic connector is disclosed that is configured to form a first magnetic circuit portion comprising a first core member and a first coil disposed of the first core member. The electromagnetic connector is configured to mate with a second electromagnetic connector, where the second electromagnetic connector is configured to form a second magnetic circuit portion comprising a second core member and a second coil disposed of the second core member. The first core member and the second core member are configured to couple the first coil to the second coil with a magnetic circuit formed from the first magnetic circuit portion and the second magnetic circuit portion when the electromagnetic connector is mated with the second electromagnetic connector. The magnetic circuit is configured to induce a signal in the first coil when the second coil is energized.

An asynchronous interface according to the disclosure includes: a transmission circuit that transmits, with data of W bits as one word, the data on the one-word basis, and transmits an REQ signal whose value differs by one bit per transmission of the data of one word; a reception circuit including a reception buffer having a reception buffer word count of n (n is an integer of 4 or more), in which the reception circuit receives the data on the one-word basis, and transmits an ACK signal whose value differs by one bit per reception of the data of one word; a data signal line that has a bit width of W, and transfers the data from the transmission circuit to the reception circuit; an REQ signal line that has a bit width of log.sub.2 (n) or more, and transfers the REQ signal from the transmission circuit to the reception circuit; and an ACK signal line that has a bit width of log.sub.2(n) or more, and transfers the ACK signal from the reception circuit to the transmission circuit.

A switch fabric is disclosed that includes a serial communications interface and a parallel communications interface. The serial communications interface is configured for connecting a plurality of slave devices to a master device in parallel to transmit information between the plurality of slave devices and the master device, and the parallel communications interface is configured for separately connecting the plurality of slave devices to the master device to transmit information between the plurality of slave devices and the master device, and to transmit information between individual ones of the plurality of slave devices. The parallel communications interface may comprise a dedicated parallel communications channel for each one of the plurality of slave devices. The serial communications interface may comprise a multidrop bus, and the parallel communications interface may comprise a cross switch.

A parallel-to-serial interface circuit includes an equalizer to delay odd data by a half period and sequentially generate odd pre data, odd main data, and odd post data, and delay even data by a half period and sequentially generate even pre data, even main data, and even post data, a final parallel-to-serial converter to sequentially and alternately select the even pre data and the odd pre data to generate pre data, sequentially and alternately select inverted odd main data and inverted even main data to generate inverted main data, and sequentially and alternately select the even post data and the odd post data to generate post data, and a driver to drive the pre data to generate a pre data level, drive the inverted main data to generate an inverted main data level, and drive the post data to generate a post data level.

A communications control system is disclosed that includes a serial communications interface and a parallel communications interface for coupling a plurality of input/output modules with a control module. The serial communications interface is configured for connecting the plurality of input/output modules to the control module in parallel to transmit information between the plurality of input/output modules and the control module, and the parallel communications interface is configured for separately connecting the plurality of input/output modules to the control module to transmit information between the plurality of input/output modules and the control module, and to transmit information between individual ones of the plurality of input/output modules. The serial communications interface may comprise a multidrop bus, and the parallel communications interface may comprise a cross switch.

A switch fabric is disclosed that includes a serial communications interface and a parallel communications interface. The serial communications interface is configured for connecting a plurality of slave devices to a master device in parallel to transmit information between the plurality of slave devices and the master device, and the parallel communications interface is configured for separately connecting the plurality of slave devices to the master device to transmit information between the plurality of slave devices and the master device, and to transmit information between individual ones of the plurality of slave devices. The parallel communications interface may comprise a dedicated parallel communications channel for each one of the plurality of slave devices. The serial communications interface may comprise a multidrop bus, and the parallel communications interface may comprise a cross switch.

A communications control system is disclosed that includes a serial communications interface and a parallel communications interface for coupling a plurality of in modules with a control module. The serial communications interface is configured for connecting the plurality of input/output modules to the control module in parallel to transmit information between the plurality of input/output modules and the control module, and the parallel communications interface is configured for separately connecting the plurality of input/output modules to the control module to transmit information between the plurality of input/output modules and the control module, and to transmit information between individual ones of the plurality of input/output modules. The serial communications interface may comprise a multidrop bus, and the parallel communications interface may comprise across switch.

An asynchronous interface according to the disclosure includes: a transmission circuit that transmits, with data of W bits as one word, the data on the one-word basis, and transmits an REQ signal whose value differs by one bit per transmission of the data of one word; a reception circuit including a reception buffer having a reception buffer word count of n (n is an integer of 4 or more), in which the reception circuit receives the data on the one-word basis, and transmits an ACK signal whose value differs by one bit per reception of the data of one word; a data signal line that has a bit width of W, and transfers the data from the transmission circuit to the reception circuit; an REQ signal line that has a bit width of log.sub.2(n) or more, and transfers the REQ signal from the transmission circuit to the reception circuit; and an ACK signal line that has a bit width of log.sub.2(n) or more, and transfers the ACK signal from the reception circuit to the transmission circuit.

A switch fabric is disclosed that includes a serial communications interface and a parallel communications interface. The serial communications interface is configured for connecting a plurality of slave devices to a master device in parallel to transmit information between the plurality of slave devices and the master device, and the parallel communications interface is configured for separately connecting the plurality of slave devices to the master device to transmit information between the plurality of slave devices and the master device, and to transmit information between individual ones of the plurality of slave devices. The parallel communications interface may comprise a dedicated parallel communications channel for each one of the plurality of slave devices. The serial communications interface may comprise a multidrop bus, and the parallel communications interface may comprise a cross switch.