Methods and apparatus for improved data movement operations through interconnect fabric. In one embodiment, Non-Transparent Bridge (NTB) technology used to perform data movement operations between a host and multiple peer devices using a DMA (direct memory access) engine and at least one descriptor ring having enhanced descriptor entries. In one implementation, descriptor ring entries include source and destination address information, address translation information, and fabric partition information. In one implementation, a DMA engine is configured directly access host memory and generate data packets using the descriptor entry information. In one embodiment, the descriptor ring is a virtual descriptor ring located on DMA hardware, host memory, or elsewhere in the NT fabric address space, and may be accessed by user processes.

A data processing system comprising: a host computer system supporting a software entity and a receive queue for the software entity; a network interface device having a controller unit configured to provide a data port for receiving data packets from a network and a data bus interface for connection to a host computer system, the network interface device being connected to the host computer system by means of the data bus interface; and an accelerator module arranged between the controller unit and a network and having a first medium access controller for connection to the network and a second medium access controller coupled to the data port of the controller unit, the accelerator module being configured to: on behalf of the software entity, process incoming data packets received from the network in one or more streams associated with a first set of one or more network endpoints; encapsulate data resulting from said processing in network data packets directed to the software entity; and deliver the network data packets to the data port of the controller unit so as to cause the network data packets to be written to the receive queue of the software entity.

Technologies for application-specific network acceleration include a computing device including a processor and an accelerator device such as a field-programmable gate array (FPGA). The processor and the accelerator device are coupled via a coherent interconnect and may be included in a multi-chip package. The computing device binds a virtual machine executed by the processor with an application function unit of the accelerator device via the coherent interconnect. The computing device processes network application data with the virtual machine and the application function unit within a coherency domain maintained with the coherent interconnect. Processing the network data may include processing a packet of a network flow by the virtual machine and processing subsequent packets of the network flow by the application function unit. Other embodiments are described and claimed.

A configuration management device provided with: a configuration storage means for storing a bridge that includes a virtual bridge and the configuration information of input/output devices; a bus recognition means for reading the configuration information of input/output devices connected to the bridge from the input/output devices and storing the read information in the configuration storage means; a virtual resource definition storage means for defining a virtual connection between the input/output devices connected to a connection means that is not the bridge and the virtual bridge; and a device access transfer means for receiving a configuration information read request for input/output devices connected to the virtual bridge that is transmitted by the bus recognition means, reading the configuration information from the input/output devices the virtual connection of which is defined, and transmitting the read configuration information to the bus recognition means.

A method, computer program product, and computing system for establishing a connection between a virtualization device and a virtual machine infrastructure. The virtualization device may be configured to be communicatively coupled to one or more PCIe devices. A virtual machine may be executed on the virtual machine infrastructure. Control of the virtualization device may be passed through the virtual machine infrastructure to the virtual machine.

A computer device includes a central processing unit (CPU), a network adapter, a bus, and an intermediate device, where the intermediate device is coupled to both the CPU and the network adapter through the bus, and is configured to establish a correspondence between address information of an agent unit and address information of a function unit, and implement forwarding of a packet between the CPU and the network adapter based on the correspondence.

A method, computer program product, and computing system for establishing a connection between a virtualization device and a virtual machine infrastructure. The virtualization device may be configured to be communicatively coupled to one or more PCIe devices. A virtual machine may be executed on the virtual machine infrastructure. Control of the virtualization device may be passed through the virtual machine infrastructure to the virtual machine.

Methods and apparatus for improved data movement operations through interconnect fabric. In one embodiment, Non-Transparent Bridge (NTB) technology used to perform data movement operations between a host and multiple peer devices using a DMA (direct memory access) engine and at least one descriptor ring having enhanced descriptor entries. In one implementation, descriptor ring entries include source and destination address information, address translation information, and fabric partition information. In one implementation, a DMA engine is configured directly access host memory and generate data packets using the descriptor entry information. In one embodiment, the descriptor ring is a virtual descriptor ring located on DMA hardware, host memory, or elsewhere in the NT fabric address space, and may be accessed by user processes.

A method for event-based simulation of a system, the simulation comprising a first computing unit and at least one second computing unit, the first computing unit has a simulation time, the second processor has an operating system layer and an application layer. The second computing unit has a system time in the operating system layer, with at least the second computing unit executing a simulation application. At least one simulation object is executable on the simulation application, and the first computing unit manages an event queue, with at least one event per simulation step being listed in the event queue. The event is associated with a process to be executed by the simulation object and a simulation time provided for execution of the process.

Disclosed herein is a method and Serially Attached SCSI (SAS) controller for transmitting data using SCSI. In an embodiment, a plurality of I/O operations received from a storage unit are fragmented into a plurality of blocks. Further, each of the plurality of blocks are mapped with corresponding memory drives. Thereafter, a reduced number of virtual lanes required for transmitting the plurality of blocks to the corresponding memory drives is estimated. Finally, the reduced number of virtual lanes are created for transmitting the plurality of blocks to the corresponding memory drives. In an embodiment, the present disclosure uses virtual lanes for transmitting data, thereby eliminating requirement of dedicated, physical lanes for transmitting the data. Consequently, according to embodiments of present disclosure, the SAS controller may be configured to simultaneously activate multiple virtual lanes for completing the data transmission, thereby resulting in faster and reliable data transmission.