Apparatus and method for injected spin echo sequences in a quantum processor. For example, one embodiment of a processor includes a decoder to decode quantum instructions to generate quantum microoperations (uops) and to decode non-quantum instructions to generate non-quantum uops, execution circuitry to execute the quantum uops and non-quantum uops, and a corrective sequence data structure to identify and/or store corrective sets of uops for one or more of the quantum instructions. The decoder is to query the corrective sequence data structure upon receiving a first quantum instruction to determine if one or more corrective uops exist, and if the one or more corrective uops exist, the decoder is to submit the one or more corrective uops for execution by the execution circuitry.

Systems and methods for efficiently routing qubits in a quantum computing system include selecting bubble nodes and routing qubits to the bubble nodes. The systems and methods further include dividing a system of nodes into regions and selecting a bubble node for each region. The systems and methods further include using super bubble nodes with reliable links connected to other super bubble nodes and bubble nodes to improve cross-region operations.

Systems and methods for efficiently routing qubits in a quantum computing system include selecting bubble nodes and routing qubits to the bubble nodes. The systems and methods further include dividing a system of nodes into regions and selecting a bubble node for each region. The systems and methods further include using super bubble nodes with reliable links connected to other super bubble nodes and bubble nodes to improve cross-region operations.

Apparatus and method for actively mitigating coherent errors by modifying an original quantum circuit, inserting Clifford gate operations at intermediate stages. Embodiments of the apparatus and method may perform CGI statically, at the compiling stage, and/or dynamically, at the control processing stage. The insertion of Clifford gates takes advantage of the symmetries in a quantum circuit and actively cancels coherent errors, maintaining the quantum processor in a state as close as possible to the original tune-up environment.

Aspects of the present disclosure may include a method and/or a system for trap-door loading including pumping at least one qubit ion from a first manifold of a first plurality of manifolds to a second manifold of the first plurality of manifolds, drive the at least one qubit ion via a partial clock transition from the second manifold of the first plurality of manifolds to a third manifold of a second plurality of manifolds, applying one or more Raman pulses to transfer the at least one qubit ion from the third manifold of the second plurality of manifolds to a fourth manifold of the second plurality of manifolds, flushing the at least one qubit ion using a high-fidelity pumping back to the first plurality of manifolds, and illuminating the first plurality of manifolds for verification.

A method of generating a randomized benchmarking protocol includes providing a randomly generated plurality of Hadamard gates; applying the Hadamard gates to a plurality of qubits; and generating randomly a plurality of Hadamard-free Clifford circuits. Each of the plurality of Hadamard-free Clifford circuits is generated by at least randomly generating a uniformly distributed phase (P) gate, and randomly generating a uniformly distributed linear Boolean invertible matrix of conditional NOT (CNOT) gate, and combining the P and CNOT gates to form each of the plurality of Hadamard-free Clifford circuits. The method also includes combining each of the plurality of Hadamard-free Clifford circuits with corresponding each of the plurality of Hadamard gates to form a sequence of alternating Hadamard-free Clifford-Hadamard pairs circuit to form the randomized benchmarking protocol; and measuring noise in a quantum mechanical processor using the randomized benchmarking protocol.

A quantum computing system for converting Pauli errors of one or more qubits to erasure errors in a photonic quantum computing architecture. Two or more photonic qubits may be input to a quantum computing system, where at least one first qubit of the two or more qubits has experienced a Pauli error. A sequence of linear optical circuitry operations may be performed on the two or more qubits to generate two or more modified qubits, wherein the sequence of operations transforms one or more of the first qubits from a logical subspace of a Fock space to an erasure subspace of the Fock space. A cluster state for universal quantum computing may be generated from the two or more modified qubits using probabilistic entangling gates. A quantum computational algorithm may be performed using the quantum cluster state generated from the two or more modified qubits.

A quantum computing system for converting Pauli errors of one or more qubits to erasure errors in a photonic quantum computing architecture. Two or more photonic qubits may be input to a quantum computing system, where at least one first qubit of the two or more qubits has experienced a Pauli error. A sequence of linear optical circuitry operations may be performed on the two or more qubits to generate two or more modified qubits, wherein the sequence of operations transforms one or more of the first qubits from a logical subspace of a Fock space to an erasure subspace of the Fock space. A cluster state for universal quantum computing may be generated from the two or more modified qubits using probabilistic entangling gates. A quantum computational algorithm may be performed using the quantum cluster state generated from the two or more modified qubits.

Systems and methods involving quantum machines, hybrid quantum machines, aspects of quantum information technology and/or other features are disclosed. In one exemplary implementation, a system is provided comprising a quantum register that stores quantum information using qubits, wherein the qubits are configured to store the quantum information using particles or objects arranged in a lattice of quantum gates, a clock that provides a clock cycle to the quantum register, and a qubit-tie computing component coupled to the quantum register, wherein the qubit-tie computing component is configured to shift the quantum information between the qubits, wherein the system stores the qubits in different states using physical qualities, which may define qubits that are configured to be entangled and superposed at a same time. Further, the quantum register may comprise an entanglement component, and/or the qubit-tie computing component may comprise a superposition component.

Apparatus and method for replacing portions of a quantum circuit with multi-qubit gates. For example, one embodiment of an apparatus comprises: a quantum circuit analyzer to evaluate an original quantum circuit specification including one or more sub-circuits of the original quantum circuit specification, the quantum circuit analyzer to generate results of the evaluation; a quantum circuit generator to generate a new quantum circuit specification based on the results of the evaluation generated by the quantum circuit analyzer, the quantum circuit generator to generate the new quantum circuit specification by, at least in part, replacing the one or more sub-circuits of the original quantum circuit specification with one or more multi-qubit gates.