Methods and systems are provided for enabling foveal adaption of temporal anti-aliasing within a foveated rendering presentation. A method for rendering a multi-resolution scene with anti-aliasing within a head mounted display (HMD) is provided. The method includes an operation for rendering a scene that includes a series of video frames. The method also includes operations for applying anti-aliasing to a first region of the scene using a first jitter offset and applying anti-aliasing to a second region of the scene using a second jitter offset. Further, the method provides for generating a foveated scene that includes the first region and the second region and for sending the foveated scene to be displayed on a display associated with the HMD, wherein the first region is associated with a higher resolution than the second scene and the first jitter offset is smaller than the second jitter offset, according to certain embodiments.

In some embodiments, a given frame or picture may have different shading rates. In one embodiment in some areas of the frame or picture the shading rate may be less than once per pixel and in other places it may be once per pixel. Examples where the shading rate may be reduced include areas where there is motion and camera defocus, areas of peripheral blur, and in general, any case where the visibility is reduced anyway. The shading rate may be changed in a region, such as a shading quad, by changing the size of the region.

An embodiment of a graphics apparatus may include a mask buffer to store a mask, a shader communicatively coupled to the mask buffer to apply the mask to a first shader pass, and a resolver communicatively coupled to the mask buffer to apply the mask to a resolve pass. The resolver may be configured to exclude a sample location not covered by the mask in the resolve pass. Other embodiments are disclosed and claimed.

A digital camera comprising a digital image sensor and at least one corrective lens element configured to reduce a blurring of an image in a horizontal or vertical dimension on the digital image sensor. The digital image sensor may be larger than a 28 millimeter diagonal.

A display device may have multiple light emitter arrays. Each array may include multiple light emitters that emit light of a color. One or more of the arrays may have a reduced spatial resolution compared to other arrays as the size of the light emitters in the arrays with the reduced resolution may be larger than other light emitters. The display device may include one or more waveguides that converges light emitted from light emitters of different colors to form an image by overlapping the light at a spatial region. The display device may include an image processing unit that applies an anti-aliasing filter to reduce any visual effect perceived by users due to the reduced resolution in one or more color channels. The anti-aliasing filter may include convolution kernels that convolve input color values of different colors and may combine the convolution result for output color values of a color.

The embodiments discussed herein involve flood filling a region with anti-aliasing. In forming a fill region, a candidate pixel can be included in the region based on a color of the pixel and also a color of a neighbor of the point. The inclusion basis may be a color distance between a seed color and the points, and a color distance between the seed color and the point's neighbor. Points in the region may be weighted according to their color distance relative to the seed color, where the color distance can also take into account alpha values. Flood filling may be anti-aliased by assigning alpha values to pixels in gaps between corners of the fill region, where an alpha value may be proportional to a point's contribution to the gap. Dimples in a fill region may be tested for and used to determine which of two flood fill algorithms to use.

One embodiment provides for a general-purpose graphics processor comprising a hardware graphics rendering pipeline configured to perform multisample anti-aliasing, the hardware graphics rendering pipeline including a pixel processing unit configured to generate pixel color data in a graphics processing pipeline, the pixel processing unit to output color data to a multisample render target, the multisample render target to store multiple sample locations for each pixel in a set of pixels. The general-purpose graphics processor further comprises a memory allocator to allocate memory to store color data associated with the multisample render target, the memory allocator to merge a memory allocation for multiple pixels having a sample associated with a same color value.

Systems, apparatuses and methods may provide away to render edges of an object defined by multiple tessellation triangles. More particularly, systems, apparatuses and methods may provide a way to perform anti-aliasing at the edges of the object based on a coarse pixel rate, where the coarse pixels may be based on a coarse Z value indicate a resolution or granularity of detail of the coarse pixel. The systems, apparatuses and methods may use a shader dispatch engine to dispatch raster rules to a pixel shader to direct the pixel shader to include, in a tile and/or tessellation triangle, one more finer coarse pixels based on a percent of coverage provided by a finer coarse pixel of a tessellation triangle at or along the edge of the object.

In some embodiments, a given frame or picture may have different shading rates. In one embodiment in some areas of the frame or picture the shading rate may be less than once per pixel and in other places it may be once per pixel. Examples where the shading rate may be reduced include areas where there is motion and camera defocus, areas of peripheral blur, and in general, any case where the visibility is reduced anyway. The shading rate may be changed in a region, such as a shading quad, by changing the size of the region.

A graphics processing hardware pipeline is arranged to perform an edge test or a depth calculation. Each hardware arrangement includes a microtile component hardware element, multiple pixel component hardware elements, one or more subsample component hardware elements and a final addition and comparison unit. The microtile component hardware element calculates a first output using a sum-of-products and coordinates of a microtile within a tile in the rendering space. Each pixel component hardware element calculates a different second output using the sum-of-products and coordinates for different pixels defined relative to an origin of the microtile. The subsample component hardware element calculates a third output using the sum-of-products and coordinates for a subsample position defined relative to an origin of a pixel. The adders sum different combinations of the first output, a second output and a third output to generate output results for different subsample positions defined relative to the origin of the tile.