Patent classifications
G09G2310/08
Display device having a gate driver compensation circuit, and driving method thereof
A display device and a driving method thereof are discussed. The display device can include a display panel for displaying images, a scan driver for supplying scan signals to the display panel, and a gate compensation circuit. The gate compensation circuit is configured to respectively sense a first node voltage and a second node voltage from a first node controller and a second node controller of the scan driver, and change a turn-on duty ratio of the first node controller to the second node controller based on the sensed first node voltage and second node voltage.
Electroluminescence display apparatus for compensating luminance deviation
An electroluminescence display apparatus includes a display panel including a first pixel and a second pixel, a first current integrator connected to the first pixel through a first sensing channel to sense a first current from the first pixel to generate a first output voltage, a second current integrator connected to the second pixel through a second sensing channel to sense a second current from the second pixel to generate a second output voltage, and a sampling capacitor connected to an output terminal of the first current integrator at one electrode thereof and connected to an output terminal of the second current integrator at the other electrode thereof, thereby sampling the first output voltage and the second output voltage.
Driving circuit and display device
Embodiments of the present disclosure are related to a driving circuit and a display device, by applying an initialization voltage to a sensing node between a driving transistor and a light-emitting element and sensing a voltage change of the sensing node according to driving the light-emitting element, a threshold voltage of the light-emitting element can be detected without turning-on the driving transistor. Furthermore, by turning on the driving transistor and falling a voltage of the sensing node before sensing the voltage of the sensing node, a voltage lower than the threshold voltage of the light-emitting element can be sensed and a variation of a characteristic value of the light-emitting element is detected, thus a circuit for sensing the characteristic value of the light-emitting element can be implemented easily.
Display device and image display system having the same
An image display system includes a graphic processor which generates an image signal, a control signal, and a variable frequency signal; and a display device which displays an image at a frame frequency corresponding to the variable frequency signal from the graphic processor. The display device includes pixels connected to emission control lines, data lines, and scan lines; a controller which provides reference data including information on reference cycles, which are cycles in which an emission control start signal is output, to the graphic processor, outputs the emission control start signal based on the control signal, and adjusting an output timing of a scan start signal based on the variable frequency signal; an emission driver which supplies emission control signals to the emission control lines based on the emission control start signal; and a scan driver which supplies scan signals to the scan lines based on the scan start signal.
Electronic device, method, and computer-readable medium for displaying screen in deformable display panel
An electronic device is provided. The electronic device includes a deformable display panel, a sensor, a display driving circuit operatively coupled to the deformable display panel and the sensor, and comprising a graphical random access memory (GRAM), and a processor operatively coupled to the display driving circuit and the sensor, wherein the display driving circuit can be configured to, while the size of a displayable area of the deformable display panel is changed, store, in the GRAM, data for displaying an image of a first size received from the processor, receive, from the sensor, a signal for indicating that the size of the displayable area is a second size smaller than the first size, after the data is stored, and scan part of the data in response to the reception of the signal, thereby displaying an image of the second size through the deformable display panel.
Systems and methods for low power common electrode voltage generation for displays
A system, circuit, and method for implementing a low power common electrode voltage for a display (e.g., LCoS display) having transistors with low to moderate breakdown voltages may include a first and a second low voltage amplifier, wherein the first amplifier generates a pixel voltage and the second amplifier generates a predetermined voltage. The circuit may include a common electrode circuit coupled to the first and second amplifier to generate a common electrode voltage. Particularly, the circuit may include a control circuit coupled to the common electrode circuit, wherein, during a first phase, the control circuit selectively controls the common electrode circuit to generate a low common electrode voltage based upon a negative value of the predetermined voltage. Further, during a second phase, the control circuit selectively controls the common electrode circuit to generate a high common electrode voltage based upon the sum of the predetermined voltage and the pixel voltage.
Driving method of display device
The display device includes at least one pixel having a first capacitive element having a first terminal and a transistor connected to the first terminal and having a second terminal and a gate electrode. A driving method of the display device including in a first frame, a signal with a first pulse width is supplied to the gate electrode of the transistor, and a first voltage is written from the second terminal to the first terminal. In the second frame after the first frame, a signal with a second pulse width is supplied to the gate electrode, and the first terminal holds the first voltage. In the third frame after the second frame, a signal with a third pulse width is supplied to the gate electrode, and the second voltage is written from the second terminal to the first terminal.
Display with hybrid oxide gate driver circuitry having multiple low power supplies
A display may include an array of pixels that receive control signals from a chain of gate drivers. Each gate driver may include a logic sub-circuit and an output buffer sub-circuit. The output buffer sub-circuit may include depletion mode semiconducting oxide transistors with high mobility. The logic sub-circuit may include semiconducting oxide transistors, some of which can be depletion mode transistors and some of which can be enhancement mode transistors with lower mobility. The logic sub-circuit may include at least a carry circuit, a voltage setting circuit, an inverting circuit, a discharge circuit.
Display latency reduction
A display device dynamically determines pixel settle times to reduce a display latency. The display device includes a backlight unit (BLU) for providing light for displaying an image, a plurality of pixels for modulating the light provided by the BLU, and a controller circuit for controlling the BLU and the plurality of pixels. The controller circuit determines a settle time from display data for a current display frame and display data for a previous display frame, and turns on the BLU based on the determined settle time. The determined settle time corresponding to an expected amount of time for the plurality of pixel to transition from a first state corresponding to the display data for the previous display frame to a second state corresponding to the display data for the current display frame.
PIXEL DRIVING CIRCUITS AND DISPLAY DEVICES
Provided is a pixel driving circuit configured to provide a signal to a to-be-driven element. The pixel driving circuit includes: a current control sub-circuit, configured to transmit a current signal; a time length control sub-circuit, configured to transmit a time signal; and an output sub-circuit, electrically connected with the time length control sub-circuit and the current control sub-circuit, respectively; where the time length control sub-circuit is further configured to control the output sub-circuit to be turned on or off based on the time signal; the output sub-circuit is configured to, when turned on, control a current applied to the to-be-driven element based on the current signal, where duration of two adjacent turn-ons of the output sub-circuit is same and duration of two adjacent turn-offs of the output sub-circuit is same.