An electronic display includes an active area including multiple pixels. The electronic display also includes a first row driver set including a first column of row drivers and a second column of row drivers. A first active row driver in the first column of row drivers drives a first portion of the multiple pixels, and a first spare row driver in the second column of row drivers is in an inactive state. The electronic display also includes a second row driver set including a third column of row drivers and a fourth column of row drivers. A third active row driver in the third column of row drivers drives a second portion of the multiple pixels, and a second spare row driver in the fourth column of row drivers is inactive.

A display panel driving apparatus includes an interface, a timing controller, a gate driver, and data driver. The interface includes a data determiner to determine whether or not input image data has a communication error and to process a packet of a data stream of the input image data, even though the input image data has the communication error. The timing controller receives the processed input image data from the interface and generates a data signal, a gate control signal, and a data control signal. The gate driver generates a gate signal based on the gate control signal. The data driver generates a data voltage based on the data control signal and the data signal.

A display device according to an exemplary embodiment includes: a display panel including a plurality of pixels; a plurality of source boards connected to the display panel; a power control board connected to the source board and configured to supply a power voltage to the plurality of pixels; and a control board configured to control an output of voltages supplied to the source board according to a control signal transmitted by the power control board.

The present disclosure proposes a pixel circuit, a control method thereof and a display panel. The pixel circuit includes a first light-emitting element, a pixel drive circuit connected with the first light-emitting element, a repair branch circuit connected with a node between the pixel drive circuit and the first light-emitting element, wherein the repair branch circuit includes a switch circuit and a second light-emitting element connected in series, and the switch circuit controls a connection or disconnection of the second light-emitting element with the pixel drive circuit; a control circuit connected with a control terminal of the switch circuit, a first data terminal and a first control terminal, the control circuit is configured to write a signal of the first data terminal to the control terminal of the switch circuit under a control of the first control terminal to control on or off of the switch circuit.

Provided is a display driving circuit including a plurality of source channels configured to provide data voltages to a plurality of data lines of a display panel, respectively; a dummy channel on one side of at least one of the source channels; and control logic configured to control operations of the source channels and the dummy channel, wherein, when failure of a first source channel from among the source channels is determined, the control logic is further configured to provide data voltages to data lines corresponding to the first source channel and second source channels, respectively, which are between the first source channel and the dummy channel, by using the second source channels and the dummy channel.

A display device includes a display panel having a curved side or a polygonal side, the display panel including a plurality of pixels in a display region, a gate driver including a plurality of normal stages connected to each other for outputting gate signals to the pixels via a plurality of gate lines, and a plurality of dummy stages between some of the normal stages, and a data driver providing data signals to the pixels via a plurality of data lines.

According to an aspect of the present disclosure, there is provided a display device including a display panel where a plurality of unit pixels are disposed, a gate driver disposed on an upper surface of the display panel and integrated in the plurality of unit pixels. Each of the plurality of unit pixels includes a main pixel and a redundancy pixel, and the gate driver supplies a gate voltage to the main pixel and the redundancy pixel. even if the main pixel becomes defective, the redundancy pixel can emit light instead of the main pixel, so that the reliability of the display device is improved.

A display circuit device includes a CPU, a display control circuit, and a drive signal generation circuit. The drive signal generation circuit includes a generation circuit that generates a first CRC value that is a CRC value of command data received from the CPU, and a transmission circuit that transmits the first CRC value to the CPU. The CPU includes an expected value generation circuit that generates a second CRC that is a CRC value of command data before being input to the drive signal generation circuit, a reception circuit that receives the first CRC value, a comparison circuit that compares the first CRC value with the second CRC value, and a control circuit that executes control based on a comparison result obtained by the comparison circuit.

Methods, systems and devices for displaying video content on large, high resolution video walls, which may comprise a mesh network of an array of display tiles with redundant network switching, in which a virtual, unlimited pixel canvas is created in a video controller memory to facilitate packetizing and addressing of video content packets for delivery to the video wall through a packet-switched network. Embodiments disclosed are particularly well-suited for use with video walls employing LED tiles.

Various embodiments disclose a display driver, wherein the display driver may be configured to detect a defective output buffer among output buffers and perform an output correction function for the defective output buffer.