Patent classifications
G09G2360/06
WIRELESS PROGRAMMABLE MEDIA PROCESSING SYSTEM
Embodiments of the subject matter described herein relate to a wireless programmable media processing system. In the media processing system, a processing unit in a computing device generates a frame to be displayed based on a graphics content for an application running on the computing device. The frame to be displayed is then divided into a plurality of block groups which are compressed. The plurality of compressed block groups are sent to a graphics display device over a wireless link. In this manner, both the generation and the compression of the frame to be displayed may be completed at the same processing unit in the computing device, which avoids data copying and simplifies processing operations. Thereby, the data processing speed and efficiency is improved significantly.
Image obtaining method and apparatus, server, and storage medium
Embodiments of this disclosure include an image obtaining method and apparatus, a server, and a storage medium. In the method, a target application process corresponding to a user identifier is obtained, by processing circuitry, from an application process set. A plurality of window image data that is currently generated is obtained, via a data obtaining module, when an image rendering function in the target application process is called. Image synthesis processing is performed on the plurality of window image data, to obtain a user interface image to be displayed. Further, a notification message that includes the user interface image is transmitted to a user terminal corresponding to the user identifier for display on a user interface.
Fine-grain GPU power management and scheduling for virtual reality applications
Systems, apparatuses, and methods for implementing fine-grain power management for virtual reality (VR) systems are disclosed. A VR compositor monitors workload tasks while rendering and displaying content of a VR application. The VR compositor determines the priorities of different tasks of a given VR frame and cause power states to be assigned to processing units to match the priorities of the tasks being performed. For example, if a first task within a first frame period is assigned a high priority, a processing unit executing the task operates at a relatively high power performance state when performing the first task. If a second task within the first frame period is assigned a low priority, the processing unit operates at a relatively low power performance state when performing the second task. By implementing fine-grain power management in a VR environment, the likelihood of the processing unit suffering a thermal event or impaired performance is reduced.
Display pacing in multi-head mounted display virtual reality configurations
Various virtual reality computing systems and methods are disclosed. In one aspect, a method of delivering video frame data to multiple VR displays is provided. The method includes generating content for multiple VR displays and sensing for competing needs for resources with real time requirements of the multiple VR displays. If competing needs for resources with real time requirements are sensed, a selected refresh offset for refreshes of the multiple VR displays is determined to avoid conflict between the competing needs for resources of the multiple VR displays. The selected refresh offset is imposed and the content is delivered to the multiple VR displays.
Adaptive multibit bus for energy optimization
Methods and apparatus relating to an adaptive multibit bus for energy optimization are described. In an embodiment, a 1-bit interconnect of a processor is caused to select between a plurality of operational modes. The plurality of operational modes comprises a first mode and a second mode. The first mode causes transmission of a single bit over the 1-bit interconnect at a first frequency and the second mode causes transmission of a plurality of bits over the 1-bit interconnect at a second frequency based at least in part on a determination that an operating voltage of the 1-bit interconnect is at a high voltage level and that the second frequency is lower than the first frequency. Other embodiments are also disclosed and claimed.
DATA STRUCTURES, METHODS AND PRIMITIVE BLOCK GENERATORS FOR STORING PRIMITIVES IN A GRAPHICS PROCESSING SYSTEM
Data structures, methods and primitive block generators for storing primitives in a graphics processing system. The method includes: receiving a primitive associated with state data that defines how the primitive is to be rendered; determining whether the state data associated with the received primitive matches state data for a current primitive block; and in response to determining that the state data for the received primitive matches the state data for the current primitive block: determining, based on one or more primitive section size constraints, whether the received primitive is to be added to a current primitive section of the current primitive block in a data store; in response to determining that the received primitive is to be added to the current primitive section, adding the received primitive to the current primitive section; and in response to determining that the received primitive is not to be added to the current primitive section: outputting the current primitive section; reconfiguring the data store to store a new primitive section for the current primitive block; and adding the received primitive to the new primitive section for the current primitive block.
CAPTION ENCODER SYSTEM AND METHOD
A caption encoder system is provided that can include a computer system and a caption encoder card. The caption encoder card can include a caption encoder module having at least one of: an input component, a field programmable gate array (FPGA), a microcontroller unit (MCU), a peripheral component interconnect express (PCIe) bridge, and a plurality of output components. The input component can be configured to receive an input SDI stream. The FPGA can be in communication with the input component and can be configured to compile an output SDI stream with embedded closed captions. The MCU can be in communication with the FPGA. The PCIe bridge can be in communication with the microcontroller unit and a plurality of universal serial bus to serial devices. The plurality of output components can be communication with the field programmable gate array.
Split-type display system
A split-type display system includes a processing device, a display device, and a transmission cable connecting the devices. The processing device includes a processing unit and a low-to-high unit. The processing unit generates a first image signal having both a first transmission rate and a first channel number. The low-to-high unit converts the first image signal into a second image signal having both a second transmission rate and a second channel number. The first transmission rate is lower than the second transmission rate. The display device includes a high-to-low unit and a display unit. The high-to-low unit receives and converts the second image signal into a third image signal having both a third transmission rate and a third channel number. The display unit displays the third image signal. a number of channels of the transmission cable is the same as the second channel number.
AUGMENTED REALITY (AR) IMPRINTING METHODS AND SYSTEMS
Augmented reality (AR) content may be created and stored as an imprint on a virtual model, where the virtual model is modeled after or mimics a real world environment. Intuitive mobile device interfaces may be used to link content with objects or surfaces near a mobile device. Subsequent users may access the same content depending on one or more access parameters.
Display control system, mobile body, display control method, display device, display method, and recording medium
A display control system includes a plurality of display devices and a display controller (display device). The display controller generates a graphics command for each frame, and attaches, to the graphics command, time stamp corresponding to an order of generation of the graphics command. Each of the plurality of display devices: acquires the graphics command; performs, in parallel, first processing of acquiring only the time stamp attached to the graphics command in the order of generation and second processing of performing rendering processing based on the graphics command in the order of generation and acquiring the time stamp attached to the graphics command based on which the rendering processing is performed; and when a difference between the time stamp acquired in the first processing and the time stamp acquired in the second processing exceeds a predetermined threshold value, performs reduction processing for reducing a load on the rendering processing.