A ferroelectric recording medium includes an electrode layer, a ferroelectric recording layer, and a protection layer formed in this order on a substrate, wherein the ferroelectric recording layer includes a ferroelectric layer, the ferroelectric layer has an amorphous structure with short-range order, a distance of the short-range order is equal to or less than 2 nm, and a lattice constant of the amorphous structure and the lattice constant of the material constituting the substrate are lattice-matched within a range of ?10%.

According to one embodiment, a system includes a head, where the head includes: an optical signal source configured to emit a first optical signal, and a near-field transducer (NFT) configured to focus the first optical signal on a moving ferroelectric storage medium positioned below the head. The system also includes a detector operatively coupled to the head, where the detector is configured to detect a second optical signal generated in and reflected from the ferroelectric storage medium, and where the second optical signal has twice the optical frequency as the first optical signal.

Microwave AC conductivity may be improved or tuned in a material, for example, a dielectric or semiconductor material, by manipulating domain wall morphology in the material. Domain walls may be created, erased or reconfigured to control the AC conductivity, for example, for crafting circuit elements. The density and placement of domain walls may increase or decrease the AC conductivity and may control AC conduction pathways through the material. An electric potential applied to the material's surface may create a desired pattern of domain walls to meet desired AC conductivity criteria. Incline angle of the domain walls may be modified relative to a crystallographic axis of the material to temporarily or permanently modify or gate AC conductivity of the material. For example, the AC conductivity of the material may be gated by domain wall incline angle to increase, decrease or throttle current flowing through the material for an electronic circuit element.

Microwave AC conductivity may be improved or tuned in a material, for example, a dielectric or semiconductor material, by manipulating domain wall morphology in the material. Domain walls may be created, erased or reconfigured to control the AC conductivity, for example, for crafting circuit elements. The density and placement of domain walls may increase or decrease the AC conductivity and may control AC conduction pathways through the material. An electric potential applied to the material's surface may create a desired pattern of domain walls to meet desired AC conductivity criteria. Incline angle of the domain walls may be modified relative to a crystallographic axis of the material to temporarily or permanently modify or gate AC conductivity of the material. For example, the AC conductivity of the material may be gated by domain wall incline angle to increase, decrease or throttle current flowing through the material for an electronic circuit element.

A ferroelectric storage apparatus includes: a ferroelectric recording medium; a conductive probe configured to write information to and read information from the ferroelectric recording medium; a probe slider configured to cause the conductive probe to travel by floating above a surface of the ferroelectric recording medium; a ferroelectric recording medium driver configured to rotate the ferroelectric recording medium; and a recording-and-reproduction signal processor configured to process a write signal and a read signal of information transmitted to and received from the conductive probe. The conductive probe includes: a base body constituted by a conductive material; an insulating layer formed on the base body and includes a through hole: and a needle-shaped electrode formed in a cone shape on the base body in the through hole. A portion of the needle-shaped electrode protrudes from a surface of the insulating layer.

A ferroelectric storage apparatus includes: a ferroelectric recording medium; a conductive probe configured to write information to and read information from the ferroelectric recording medium; a probe slider configured to cause the conductive probe to travel by floating above a surface of the ferroelectric recording medium; a ferroelectric recording medium driver configured to rotate the ferroelectric recording medium; and a recording-and-reproduction signal processor configured to process a write signal and a read signal of information transmitted to and received from the conductive probe. The conductive probe includes: a base body constituted by a conductive material; an insulating layer formed on the base body and includes a through hole: and a needle-shaped electrode formed in a cone shape on the base body in the through hole. A portion of the needle-shaped electrode protrudes from a surface of the insulating layer.

According to one embodiment, a system includes a head, where the head includes: an optical signal source configured to emit a first optical signal, and a near-field transducer (NFT) configured to focus the first optical signal on a moving ferroelectric storage medium positioned below the head. The system also includes a detector operatively coupled to the head, where the detector is configured to detect a second optical signal generated in and reflected from the ferroelectric storage medium, and where the second optical signal has twice the optical frequency as the first optical signal.

A circular printed memory device and a method for fabricating the circular printed memory device are disclosed. For example, the circular printed memory device includes a base substrate, a plurality of bottom electrodes arranged in a circular pattern on the base substrate, a ferroelectric layer on top of the plurality of bottom electrodes and a single top electrode on the ferroelectric layer that contacts each one of the plurality of bottom electrodes via the ferroelectric layer.

The present disclosure relates to an integrated chip. The integrated chip includes a lower electrode disposed within a dielectric structure over a substrate. A ferroelectric data storage structure is disposed over the lower electrode and an upper electrode is disposed over the ferroelectric data storage structure. One or more stressed sidewall spacers are arranged on opposing sides of the upper electrode. The ferroelectric data storage structure has an orthorhombic phase concentration that varies from directly below the one or more stressed sidewall spacers to laterally outside of the one or more stressed sidewall spacers.

The present disclosure relates to an integrated chip. The integrated chip includes a lower electrode disposed within a dielectric structure over a substrate. A ferroelectric data storage structure is disposed over the lower electrode and an upper electrode is disposed over the ferroelectric data storage structure. One or more stressed sidewall spacers are arranged on opposing sides of the upper electrode. The ferroelectric data storage structure has an orthorhombic phase concentration that varies from directly below the one or more stressed sidewall spacers to laterally outside of the one or more stressed sidewall spacers.