Provided herein is a cell of a magnetic random access memory (MRAM) circuit. The cell includes a horizontal outer perimeter and an access transistor including a first terminal, a second terminal, and a gate terminal. The cell includes a magnetic tunnel junction (MTJ) structure located in the horizontal outer perimeter and above the bottom electrode. The MTJ structure being centered within the horizontal outer perimeter. The cell includes a bottom electrode located entirely within the horizontal outer perimeter. The bottom electrode comprising a shape enabling the MTJ structure to be centered within the horizontal outer perimeter.

In a technique for inducing local electric field controlled magnetization, despite the absence of magnetic components, there is provided a novel heterostructure, a semiconductor device thereof, or an array of semiconductor devices. The heterostructure includes a semiconductor substrate carrying a plurality of layers forming at least one heterojunction and hosting a two-dimensional electron gas layer when one of the layer of the plurality of layers is bounded to an interacting layer being a chiral or a biological macromolecule assembly.

In a technique for inducing local electric field controlled magnetization, despite the absence of magnetic components, there is provided a novel heterostructure, a semiconductor device thereof, or an array of semiconductor devices. The heterostructure includes a semiconductor substrate carrying a plurality of layers forming at least one heterojunction and hosting a two-dimensional electron gas layer when one of the layer of the plurality of layers is bounded to an interacting layer being a chiral or a biological macromolecule assembly.

Endurance mechanisms are introduced for memories such as non-volatile memories for broad usage including caches, last-level cache(s), embedded memory, embedded cache, scratchpads, main memory, and storage devices. Here, non-volatile memories (NVMs) include magnetic random-access memory (MRAM), resistive RAM (ReRAM), ferroelectric RAM (FeRAM), phase-change memory (PCM), etc. In some cases, features of endurance mechanisms (e.g., randomizing mechanisms) are applicable to volatile memories such as static random-access memory (SRAM), and dynamic random-access memory (DRAM). The endurance mechanisms include a wear leveling scheme that uses index rotation, outlier compensation to handle weak bits, and random swap injection to mitigate wear out attacks.

Some embodiments of the present disclosure relate to a memory device. The memory device includes an active current path including a data storage element; and a reference current path including a reference resistance element. The reference resistance element has a resistance that differs from a resistance of the data storage element. A delay-sensing element has a first input coupled to the active current path and a second input coupled to the reference current path. The delay-sensing element is configured to sense a timing delay between a first signal on the active current path and a second signal on the reference current path. The delay-sensing element is further configured to determine a data state stored in the data storage element based on the timing delay.

Some embodiments of the present disclosure relate to a memory device. The memory device includes an active current path including a data storage element; and a reference current path including a reference resistance element. The reference resistance element has a resistance that differs from a resistance of the data storage element. A delay-sensing element has a first input coupled to the active current path and a second input coupled to the reference current path. The delay-sensing element is configured to sense a timing delay between a first signal on the active current path and a second signal on the reference current path. The delay-sensing element is further configured to determine a data state stored in the data storage element based on the timing delay.

A semiconductor device including a substrate that has a first region and a second region, a plurality of lower conductive patterns on the substrate, the plurality of lower conductive patterns including a first conductive pattern in the first region of the substrate and a second conductive pattern in the second region of the substrate, a magnetic tunnel junction on the first conductive pattern, a contact between the magnetic tunnel junction and the first conductive pattern, a through electrode on the second conductive pattern, and a plurality of upper conductive patterns on the magnetic tunnel junction and the through electrode. The contact includes a first contact on the lower conductive patterns, a second contact on the first contact, and a first barrier layer that covers a bottom surface and a lateral surface of the second contact.

A semiconductor device including a substrate that has a first region and a second region, a plurality of lower conductive patterns on the substrate, the plurality of lower conductive patterns including a first conductive pattern in the first region of the substrate and a second conductive pattern in the second region of the substrate, a magnetic tunnel junction on the first conductive pattern, a contact between the magnetic tunnel junction and the first conductive pattern, a through electrode on the second conductive pattern, and a plurality of upper conductive patterns on the magnetic tunnel junction and the through electrode. The contact includes a first contact on the lower conductive patterns, a second contact on the first contact, and a first barrier layer that covers a bottom surface and a lateral surface of the second contact.

The invention relates to a technique for inducing local electric field controlled magnetization, despite the absence of magnetic components. There is provided a novel heterostructure (100), a semiconductor device thereof, or an array of semiconductor devices. The heterostructure comprises a semiconductor substrate (102) carrying a plurality of layers forming at least one heterojunction (104) and hosting a two-dimensional electron gas layer (104B) when one of the layer of the plurality of layers is bounded to an interacting layer (106) being a chiral or a biological macromolecule assembly.

The invention relates to a technique for inducing local electric field controlled magnetization, despite the absence of magnetic components. There is provided a novel heterostructure (100), a semiconductor device thereof, or an array of semiconductor devices. The heterostructure comprises a semiconductor substrate (102) carrying a plurality of layers forming at least one heterojunction (104) and hosting a two-dimensional electron gas layer (104B) when one of the layer of the plurality of layers is bounded to an interacting layer (106) being a chiral or a biological macromolecule assembly.