Patent classifications
G11C11/21
MEMRISTOR BASED STORAGE OF ASSET EVENTS
An example device comprising contactless circuitry to receive data about a plurality of events corresponding to an asset, and a memristor coupled to the contactless circuitry to store the data about the plurality of events. The contactless circuitry may determine that the asset has experienced an event, receive a transaction corresponding to the event from a decentralized entity, generate a hash of the transaction including a device identifier of the contactless circuitry and the transaction received from the decentralized entity, verify the hashed transaction with the decentralized entity, and store the verified hashed transaction on the memristor of the contactless circuitry, wherein the stored verified hash includes information about the event.
CHARGE-SHARING COMPUTE-IN-MEMORY SYSTEM
Certain aspects provide a circuit for in-memory computation. The circuit generally includes a first memory cell, and a first computation circuit. The first computation circuit may include a first switch having a control input coupled to an output of the first memory cell, a second switch coupled between a node of the first computation circuit and the first switch, a control input of the second switch being coupled to a discharge word-line (DCWL), a capacitive element coupled between the node and a reference potential node, a third switch coupled between the node and a read bit-line (RBL), and a fourth switch coupled between the node and an activation (ACT) line.
Semiconductor Memory Having Both Volatile and Non-Volatile Functionality Comprising Resistive Change Material and Method of Operating
A semiconductor memory cell including a capacitorless transistor having a floating body configured to store data as charge therein when power is applied to the cell, and a non-volatile memory comprising a bipolar resistive change element, and methods of operating.
Semiconductor Memory Having Both Volatile and Non-Volatile Functionality Comprising Resistive Change Material and Method of Operating
A semiconductor memory cell including a capacitorless transistor having a floating body configured to store data as charge therein when power is applied to the cell, and a non-volatile memory comprising a bipolar resistive change element, and methods of operating.
Memristor based storage of asset events
An example device comprising contactless circuitry to receive data about a plurality of events corresponding to an asset, and a memristor coupled to the contactless circuitry to store the data about the plurality of events. The contactless circuitry may determine that the asset has experienced an event, receive a transaction corresponding to the event from a decentralized entity, generate a hash of the transaction including a device identifier of the contactless circuitry and the transaction received from the decentralized entity, verify the hashed transaction with the decentralized entity, and store the verified hashed transaction on the memristor of the contactless circuitry, wherein the stored verified hash includes information about the event.
Memristor based storage of asset events
An example device comprising contactless circuitry to receive data about a plurality of events corresponding to an asset, and a memristor coupled to the contactless circuitry to store the data about the plurality of events. The contactless circuitry may determine that the asset has experienced an event, receive a transaction corresponding to the event from a decentralized entity, generate a hash of the transaction including a device identifier of the contactless circuitry and the transaction received from the decentralized entity, verify the hashed transaction with the decentralized entity, and store the verified hashed transaction on the memristor of the contactless circuitry, wherein the stored verified hash includes information about the event.
ELECTRONIC DEVICE AND OPERATING METHOD OF ELECTRONIC DEVICE
Disclosed is an operating method of an electronic device, which includes receiving input data, selecting a program voltage pattern corresponding to the input data from among a plurality of program voltage patterns for storing the input data in a memristor array circuit, and storing the input data in the memristor array circuit depending on the program voltage pattern thus selected. Each of the plurality of program voltage patterns includes a plurality of voltage pulses in which a pulse magnitude gradually increases over time.
Vertically integrated neuro-processor
A vertically integrated neuro-processor comprises a plurality of neural storage-processing units (NSPU's). Each NSPU comprises at least a neuro-storage circuit and a neuro-processing circuit. The neuro-storage circuit comprises a memory array for storing at least a synaptic weight, while the neuro-processing circuit performs neural processing with the synaptic weight. The memory array and the neuro-processing circuit are vertically stacked and communicatively coupled by a plurality of inter-level connections.
REMOTE SENSING
An apparatus comprising: a memristor; means for wirelessly receiving, from another apparatus, a time-varying signal; means for enabling, responsive to the received time-varying signal, provision of one or more pulses to the memristor to change an electrical characteristic of the memristor; means for wirelessly signalling to the other apparatus when the electrical characteristic of the memristor reaches a threshold value; and means for re-setting the electrical characteristic of the memristor.
Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating
A semiconductor memory cell including a capacitorless transistor having a floating body configured to store data as charge therein when power is applied to the cell, and a non-volatile memory comprising a bipolar resistive change element, and methods of operating.