Methods for controlled segregation of blocks of information encoded in the sequence of a biopolymer, such as nucleic acids and polypeptides, with rapid retrieval based on multiply addressing nanostructured data have been developed. In some embodiments, sequence controlled polymer memory objects include data-encoded biopolymers of any length or form encapsulated by natural or synthetic polymers and including one or more address tags. The sequence address labels are used to associate or select memory objects for sequencing read-out, enabling organization and access of distinct memory objects or subsets of memory objects using Boolean logic. In some embodiments, a memory object is a single-stranded nucleic acid scaffold strand encoding bit stream information that is folded into a nucleic acid nanostructure of arbitrary geometry, including one or more sequence address labels. Methods for controlled degradation of biopolymer-encoded blocks of information in the memory objects are also developed.

Embodiments described herein include systems and techniques for converting (i.e., transducing) a quantum-level (e.g., single photon) signal between the three wave forms (i.e., optical, acoustic, and microwave). A suspended crystalline structure is used at the nanometer scale to accomplish the desired behavior of the system as described in detail herein. Transducers that use a common acoustic intermediary transform optical signals to acoustic signals and vice versa as well as microwave signals to acoustic signals and vice versa. Other embodiments described herein include systems and techniques for storing a qubit in phonon memory having an extended coherence time. A suspended crystalline structure with specific geometric design is used at the nanometer scale to accomplish the desired behavior of the system.

The present disclosure generally relates to multi-switch storage cells (MSSCs), three-dimensional MSSC arrays, and three-dimensional MSSC memory. Multi-switch storage cells include a cell select device, multiple resistive change elements, and an intracell wiring electrically connecting the multiple resistive change elements together and to the cell select device. MSSC arrays are designed (architected) and operated to prevent inter-cell (sneak path) currents between multi-switch storage cells, which prevents stored data disturb from adjacent cells and adjacent cell data pattern sensitivity. Additionally, READ and WRITE operations may be performed on one of the multiple resistive change elements in a multi-switch storage cell without disturbing the stored data in the remaining resistive change elements. However, controlled parasitic currents may flow in the remaining resistive change elements within the cell. Isolating each multi-switch storage cell in a three-dimensional MSSC array, enables in-memory computing for applications such as data processing for machine learning and artificial intelligence.

A system for DNA gene assembly that utilizes a DNA symbol library and a DNA linker library. The symbol library has a number of DNA symbols each having a first overhanging end and a second overhanging end different than and non-complimentary to the first end, the first and second ends being the same nucleotides for each DNA symbol. The linker library has pairs of DNA linkers, a first linker of a pair having a first end and a second end and a second linker of the pair having a first end and a second end, the first end of the first linker being the same nucleotides for each first linker and the second end of the second linker being the same nucleotides for each second linker, wherein the second end of the first linker and the first end of the second linker have complementary nucleotides. The first linker joins to the first end of a DNA symbol and the second linker joins to the second end of another DNA symbol.

A system for DNA gene assembly that utilizes a DNA symbol library and a DNA linker library. The symbol library has a number of DNA symbols each having a first overhanging end and a second overhanging end different than and non-complimentary to the first end, the first and second ends being the same nucleotides for each DNA symbol. The linker library has pairs of DNA linkers, a first linker of a pair having a first end and a second end and a second linker of the pair having a first end and a second end, the first end of the first linker being the same nucleotides for each first linker and the second end of the second linker being the same nucleotides for each second linker, wherein the second end of the first linker and the first end of the second linker have complementary nucleotides. The first linker joins to the first end of a DNA symbol and the second linker joins to the second end of another DNA symbol.

Methods of operating memory arrays are described. In various embodiments, a method includes determining a pattern to be written to a memory array, the pattern comprising both data bits having sensitive information to be stored and data bits having a state that is unimportant to the sensitive information to be stored, and writing the pattern to the memory array. Other methods of operation are also described.

Methods of operating memory arrays are described. In various embodiments, a method includes determining a pattern to be written to a memory array, the pattern comprising both data bits having sensitive information to be stored and data bits having a state that is unimportant to the sensitive information to be stored, and writing the pattern to the memory array. Other methods of operation are also described.

A configuration for a carbon nanotube (CNT) based memory device can include multiple CNT elements in order to increase memory cell yield by reducing the times when a memory cell gets stuck at a high state or a low state.

A method for operating a memory device comprising a plurality of memory cells, the method may include: performing a first refresh operation comprising sequentially applying a recovery pulse to each of the plurality of memory cells and repeating the sequential application of the recovery pulse to each of the plurality of memory cells for a predetermined number of times; and performing a second refresh operation comprising sequentially re-writing data of each of the plurality of memory cells once after the first refresh operation is performed for the predetermined number of times.

A high-speed memory circuit architecture for arrays of resistive change elements is disclosed. An array of resistive change elements is organized into rows and columns, with each column serviced by a word line and each row serviced by two bit lines. Each row of resistive change elements includes a pair of reference elements and a sense amplifier. The reference elements are resistive components with electrical resistance values between the resistance corresponding to a SET condition and the resistance corresponding to a RESET condition within the resistive change elements being used in the array. A high speed READ operation is performed by discharging one of a row's bit lines through a resistive change element selected by a word line and simultaneously discharging the other of the row's bit lines through of the reference elements and comparing the rate of discharge on the two lines using the row's sense amplifier. Storage state data are transmitted to an output data bus as high speed synchronized data pulses. High speed data is received from an external synchronized data bus and stored by a PROGRAM operation within resistive change elements in a memory array configuration.