In some examples, a temperature distribution sensor may include a laser source to emit a laser beam that is tunable over a wavelength range. The wavelength range may be less than a Raman bandwidth in a device under test (DUT), or of-the-order-of the Raman bandwidth in the DUT. A pulsed source may apply a pulse drive signal to the laser beam or to a modulator to modulate the laser beam that is to be injected into the DUT. A bandpass filter may be operatively disposed between the laser source and the DUT, and may be configured to an anti-Stokes wavelength that is narrower than the Raman bandwidth. A photodiode may be operatively disposed between the bandpass filter and the DUT to acquire, from the DUT, anti-Stokes optical time-domain reflectometer traces for two preset wavelengths of the laser beam to determine a temperature distribution for the DUT.

In some examples, a temperature distribution sensor may include a laser source to emit a laser beam that is tunable over a wavelength range. The wavelength range may be less than a Raman bandwidth in a device under test (DUT), or of-the-order-of the Raman bandwidth in the DUT. A pulsed source may apply a pulse drive signal to the laser beam or to a modulator to modulate the laser beam that is to be injected into the DUT. A bandpass filter may be operatively disposed between the laser source and the DUT, and may be configured to an anti-Stokes wavelength that is narrower than the Raman bandwidth. A photodiode may be operatively disposed between the bandpass filter and the DUT to acquire, from the DUT, anti-Stokes optical time-domain reflectometer traces for two preset wavelengths of the laser beam to determine a temperature distribution for the DUT.

A battery module is composed of a plurality of battery cells according to an embodiment of the present invention and includes one positive output terminal formed by connecting the plurality of battery cells, one negative output terminal formed by connecting the plurality of battery cells, a field effect transistor (FET) provided on a current path between the positive output terminal and an external device, a temperature information measurer for measuring temperature information of the plurality of battery cells, and a protection integrated circuit (IC) chip for controlling the FET.

Methods, systems, and devices for advanced power off notification for managed memory are described. An apparatus may include a memory array comprising a plurality of memory cells and a controller coupled with the memory array. The controller may be configured to receive a notification indicating a transition from a first state of the memory array to a second state of the memory array. The notification may include a value, the value comprising a plurality of bits and corresponding to a minimum duration remaining until a power supply of the memory array is deactivated. The controller may also execute a plurality of operations according to an order determined based at least in part on a parameter associated with the memory array and receiving the notification comprising the value.

Methods, systems, and devices for advanced power off notification for managed memory are described. An apparatus may include a memory array comprising a plurality of memory cells and a controller coupled with the memory array. The controller may be configured to receive a notification indicating a transition from a first state of the memory array to a second state of the memory array. The notification may include a value, the value comprising a plurality of bits and corresponding to a minimum duration remaining until a power supply of the memory array is deactivated. The controller may also execute a plurality of operations according to an order determined based at least in part on a parameter associated with the memory array and receiving the notification comprising the value.

It is assumed that at least one of the plurality of nonvolatile semiconductor memory devices is a nonvolatile semiconductor memory device (hereinafter, referred to as a first memory device) in a low power consumption state in which error check processing and refresh processing cannot be performed. A storage apparatus releases a low power consumption state of a first memory device at a timing according to a lapsed time after the first memory device is in the low power consumption state and an estimated ambient temperature of the first memory device at the lapsed time. When the low power consumption state is released, the first memory device executes the error check processing and the refresh processing.

It is assumed that at least one of the plurality of nonvolatile semiconductor memory devices is a nonvolatile semiconductor memory device (hereinafter, referred to as a first memory device) in a low power consumption state in which error check processing and refresh processing cannot be performed. A storage apparatus releases a low power consumption state of a first memory device at a timing according to a lapsed time after the first memory device is in the low power consumption state and an estimated ambient temperature of the first memory device at the lapsed time. When the low power consumption state is released, the first memory device executes the error check processing and the refresh processing.

A temperature sensor is disclosed. The temperature sensor includes an analog core having at least first and second circuit nodes and configured to provide a temperature dependent output, a multiplexer coupled to the first and second circuit nodes and configured for at least first and second states in each of which the first circuit node couples to a different circuit element and in each of which the second circuit node couples to a different circuit element, and a controller coupled to the analog core and configured to provide a temperature measurement that is an average of at least first and second readings of the temperature dependent output of the analog core, the first reading taken while the multiplexer is in the first state, and the second reading taken while the multiplexer is in the second state.

A temperature sensor is disclosed. The temperature sensor includes an analog core having at least first and second circuit nodes and configured to provide a temperature dependent output, a multiplexer coupled to the first and second circuit nodes and configured for at least first and second states in each of which the first circuit node couples to a different circuit element and in each of which the second circuit node couples to a different circuit element, and a controller coupled to the analog core and configured to provide a temperature measurement that is an average of at least first and second readings of the temperature dependent output of the analog core, the first reading taken while the multiplexer is in the first state, and the second reading taken while the multiplexer is in the second state.

Methods for measuring a temperature of a wafer chuck and calibrating temperature and a temperature measuring system are provided. The measuring method includes: placing a test wafer on a wafer chuck, where a plurality of semiconductor devices having electrical parameters varying as a function of temperature are formed on the test wafer; making the temperature of the wafer chuck reach set temperatures; measuring the semiconductor devices respectively to obtain electrical parameters corresponding to the semiconductor devices; obtaining actual temperatures of the semiconductor devices according to the electrical parameters and variations, of the electrical parameters, as the function of temperature; and obtaining an actual temperature distribution of the wafer chuck according to the actual temperatures of the semiconductor devices.