A waveform capture device (WCD) is a flexible measurement system capable of recording complex digital signals on trillionth-of-a-second (ps) time scales. The WCD may be implemented via modular code on an off-the-shelf field-programmable gate-array (FPGA), and incorporates both time-to-digital converter (TDC) and digital storage oscilloscope (DSO) functionality. The device captures a waveform by taking snapshots of a signal as it propagates down an ultra-fast transmission line known as a carry chain (CC). It may be calibrated via a dynamic phase-shifting (DPS) method that requires substantially less data and resources than conventional techniques.

A test system includes a test and measurement instrument having one or more inputs for receiving one or more signals to be measured or tested, a display for outputting measurement results or test results, one or more processors for operating the instrument, a chassis housing the instrument, a power connection to receive power for powering the one or more processors from a wall connection. The test system further includes an external battery pack separate from the test and measurement instrument and structured to mechanically and electrically couple to and decouple from the test and measurement instrument, the external battery pack including a DC power source for powering the one or more processors. The test and measurement instrument includes no batteries or other power storage device for powering the one or more processors within the chassis of the instrument.

A test and measurement device has an input port configured to receive a signal from a device under test, the signal having a symbol rate, one or more analog-to-digital converters to convert the signal to waveform samples at a sampling rate, and one or more processors configured to execute code that, when aliasing is present in the waveform samples, causes the one or more processors to: up-sample the waveform samples to produce up-sampled samples; use the up-sampled samples to produce a real-time waveform; perform clock recovery on the real-time waveform to produce a recovered clock; and resample the waveform samples using the recovered clock to produce a non-aliased waveform. A method of acquiring a waveform in a test and measurement device includes receiving a signal from a device under test, the signal having a symbol rate, converting the signal to waveform samples at a sampling rate of the test and measurement device, when aliasing is present in the waveform samples, up-sampling the waveform samples to produce up-sampled samples, using the up-sampled samples to produce a real-time waveform, performing clock recovery on the real-time waveform to produce a recovered clock, and resampling the waveform samples using the recovered clock to produce a non-aliased waveform.

A device includes a control circuit, a scope circuit, a first logic gate and a second logic gate. The control circuit is configured to generate a first control signal according to a voltage signal and a delayed signal. The scope circuit is configured to generate a first current signal in response to the first control signal and the voltage signal. The first logic gate is configured to perform a first logical operation on the voltage signal and one of the voltage signal and the delayed signal to generate a second control signal. The second logical gate configured to perform a second logical operation on the second control signal and a test control signal to generate a second current signal.

A digital data rate enhancement filter is described. The digital data rate enhancement filter-includes an enhancement filter input, a first interpolation filter, a second interpolation filter, and a multiplexer circuit. The first interpolation filter is connected to the enhancement filter input downstream of the enhancement filter input. The second interpolation filter is connected to the first interpolation filter downstream of the first interpolation filter. The enhancement filter input is configured to receive a digital input signal set. The first interpolation filter is configured to receive the digital input signal set and to interpolate the digital input signal set, thereby obtaining a first interpolated signal set. The second interpolation filter is configured to receive the first interpolated signal set and to interpolate the first interpolated signal set, thereby obtaining a second interpolated signal set. The multiplexer circuit is configured to selectively receive the first interpolated signal set and/or the second interpolated signal set. The multiplexer circuit further is configured to output the first interpolated signal set and/or the second interpolated signal set received. Further, a digital data rate reduction filter and a digital oscilloscope are described.

A test and measurement system can include a data store configured to store augmentation settings for dynamically augmenting a physical testing environment and a computing device coupled to the data store. The computing device can be configured to receive an input feed from the physical testing environment, create an augmentation image based on the augmentation settings and the input feed, and output the augmented image to be overlaid on the physical testing environment to augment a user's view of the physical testing environment.

A direct current (DC) power rail probe includes a single-ended probe tip, and a two-path circuit having an input coupled to the single-ended probe tip and an output configured for connection to measurement equipment such as an oscilloscope. The two-path circuit includes an alternating current (AC) path in parallel with a feed-forward (FF) path, the AC path including a capacitive element, and the FF path including a series connection of at least one resistive element and an amplifier. The probe tip and two-path circuit are selectively operable in a non-attenuating mode and an attenuating mode.

The present disclosure relates to a parallel filter structure for processing a signal. The parallel filter structure includes a signal input configured to receive a time and value discrete input signal. The parallel filter structure includes a feed forward equalizer circuit connected with the signal input for receiving the time and value discrete input signal. The parallel filter structure includes a decision feedback equalizer circuit connected with the signal input for receiving the time and value discrete input signal. The feed forward equalizer circuit and the decision feedback equalizer circuit together form a parallel circuit. Further, an oscilloscope and a method of processing a signal are provided.

A method and system measure a characteristic of a signal under test (SUT) using a signal measurement device. The method includes receiving and digitizing the first and second copies of the SUT through first and second input channels to obtain first and second digitized waveforms; repeatedly determining measurement values of the SUT characteristic in the first and second digitized waveforms to obtain first and second measurement values, which are paired in measurement value pairs; multiplying the first and second measurement values in each of the measurement value pairs to obtain measurement products; determining an average value of the measurement products to obtain an MSV of the measured SUT characteristic; and determine a square root of the MSV to obtain an RMS value of the measured SUT characteristic. The RMS value substantially omits variations not in the SUT, which are introduced by only one of the first and second input channels.

In one implementation, a circuit can include a reference pin and an operational amplifier that can include an output pin, an inverting input pin and a non-inverting input pin. The inverting input pin can be electrically coupled to the output pin via a first impedance and to the reference pin via a second impedance. The non-inverting input pin can be electrically coupled to the reference pin via a third impedance and can be configured to receive a detection signal. The reference pin can be configured to receive a detection reference signal associated with the detection signal.