A signal analysis method is described. The signal analysis method comprises the following steps. An output signal is received from a device under test. A sampling point density is received and/or the sampling point density is determined based on the output signal. A response function of the device under test is determined based on the output signal and based on the sampling point density. The sampling point density represents a number of sampling points per frequency interval for determining the response function. The response function characterizes at least one property of the device under test as a function of frequency. Moreover a measurement system for determining a response function of a device under test is described.

A real-time spectrum analyzer (RSTA) includes an analog-to-digital converter (ADC) configured to convert in an input analog signal into a digital input data stream, a fast Fourier transform (FFT) unit configured to generate FFTs of the digital input data stream for successive time slices of the input analog signal, wherein the FFTs of each time slice are grouped into FFT bins, each FFT bin including the FFTs of a given frequency band, a first detector configured to reduce a number of FFTs per bin generated by the FFT unit and output a corresponding thinned FFT data stream for each of the successive time slices, a second detector configured to compress the thinned FFT data stream output by the first detector and output a compressed FFT data stream for each of the successive time slices, an FFT plotter configured to generate first display data representing an FFT plot of a given time slice of the input analog signal from the thinned FFT data stream output by the first detector, and a spectrogram plotter configured to generate second display data of a spectrogram of the given time slice and previous time slices of the input analog signal from the compressed FFT data stream output by the second detector.

In one implementation, a circuit can include a reference pin and an operational amplifier that can include an output pin, an inverting input pin and a non-inverting input pin. The inverting input pin can be electrically coupled to the output pin via a first impedance and to the reference pin via a second impedance. The non-inverting input pin can be electrically coupled to the reference pin via a third impedance and can be configured to receive a detection signal. The reference pin can be configured to receive a detection reference signal associated with the detection signal.

A method and system measure a characteristic of a signal under test (SUT) using a signal measurement device. The method includes receiving the SUT through first and second input channels; digitizing first and second copies of the SUT to obtain first and second digitized waveforms; repeatedly determining first and second measurement trends to obtain measurement trend pairs; cross-correlating the first and second measurement trends in each measurement trend pair to obtain cross-correlation vectors; extracting zero-displacement values from the cross-correlation vectors, respectively; summing the zero-displacement values to obtain a sum of measurement products for the measurement trend pairs; divide the sum of zero-displacement values by a total number of measurement products to obtain an average value of the measurement products, corresponding to MSV of the measured SUT characteristic; and determining a square root of the average value of the MSV to obtain an RMS value of the measured SUT characteristic.

A test and measurement instrument for generating an analog waveform, including an interpolator configured to receive a digital signal and output interpolated samples of the digital signal at a sample rate, a filter modulation controller configured to output first filter coefficients at a first time and second filter coefficients at a second time, a convolver configured to generate a convolved signal by convolving the interpolated samples of the digital signal and the first filter coefficients and convolving the interpolated samples of the digital signal and the second filter coefficients; and a digital-to-analog converter configured to convert the convolved signal to an analog signal based on a fixed, constant clock signal.

The present disclosure relates to a parallel filter structure for processing a signal. The parallel filter structure includes a signal input configured to receive a time and value discrete input signal. The parallel filter structure includes a feed forward equalizer circuit connected with the signal input for receiving the time and value discrete input signal. The parallel filter structure includes a decision feedback equalizer circuit connected with the signal input for receiving the time and value discrete input signal. The feed forward equalizer circuit and the decision feedback equalizer circuit together form a parallel circuit. Further, an oscilloscope and a method of processing a signal are provided.

Embodiments of the present invention relate to the technical field of oscilloscopes and disclose a method and an apparatus for processing an oscilloscope signal and an oscilloscope. The method for processing the oscilloscope signal includes: obtaining a voltage signal; determining high and low level signals in the voltage signal according to a reference voltage; determining a valid digital signal from the high and low level signals; and displaying a waveform image of the digital signal. According to the embodiments of the present invention, the voltage signal may be converted into the digital signal without digital processing on the voltage signal via a hardware device such as an analog converter, thereby reducing costs of the oscilloscope and facilitating user operation and carrying.

A method and system measure a characteristic of a signal under test (SUT) using a signal measurement device. The method includes receiving and digitizing the first and second copies of the SUT through first and second input channels to obtain first and second digitized waveforms; repeatedly determining measurement values of the SUT characteristic in the first and second digitized waveforms to obtain first and second measurement values, which are paired in measurement value pairs; multiplying the first and second measurement values in each of the measurement value pairs to obtain measurement products; determining an average value of the measurement products to obtain an MSV of the measured SUT characteristic; and determine a square root of the MSV to obtain an RMS value of the measured SUT characteristic. The RMS value substantially omits variations not in the SUT, which are introduced by only one of the first and second input channels.

A method and system measure a characteristic of a signal under test (SUT) using a signal measurement device. The method includes receiving the SUT through first and second input channels; digitizing first and second copies of the SUT to obtain first and second digitized waveforms; repeatedly determining first and second measurement trends to obtain measurement trend pairs; cross-correlating the first and second measurement trends in each measurement trend pair to obtain cross-correlation vectors; extracting zero-displacement values from the cross-correlation vectors, respectively; summing the zero-displacement values to obtain a sum of measurement products for the measurement trend pairs; divide the sum of zero-displacement values by a total number of measurement products to obtain an average value of the measurement products, corresponding to MSV of the measured SUT characteristic; and determining a square root of the average value of the MSV to obtain an RMS value of the measured SUT characteristic.

A device includes a control circuit, a scope circuit, a first logic gate and a second logic gate. The control circuit is configured to generate a first control signal according to a voltage signal and a delayed signal. The scope circuit is configured to generate a first current signal in response to the first control signal and the voltage signal. The first logic gate is configured to perform a first logical operation on the voltage signal and one of the voltage signal and the delayed signal to generate a second control signal. The second logical gate configured to perform a second logical operation on the second control signal and a test control signal to generate a second current signal.