Method (100) for ascertaining a parameter (I_avg, I_N, I_P, V_c), wherein the parameter (I_avg, I_N, I_P, V_c) characterizes a current or a voltage in a circuit arrangement (200). The circuit arrangement (200) comprises an inductor (L) through which an alternating choke current (I_L) flows. The method comprises the steps of: ascertaining (120) at least one duration (TN1) between two zero crossings (N_, N_+) of the choke current (I_L), or a duration (TNE1) between a zero crossing (N_, N_+) and a vertex (E_, E_+) of the choke current (I_L); ascertaining (130) the parameter (I_avg, I_N, I_P, V_c) as a function of the ascertained duration (TN1, TNE1).

Some embodiments relate to a passive phase connection detection method for feeder power lines of an electricity distribution network. The method can include acquiring a list of meters for each feeder power line of the electricity distribution network; acquiring presumed phase connection data and historic voltage data of each meter of the list of meters of each feeder power line; assigning weight values to the presumed phase connection data to each meter of the list of meters of a first feeder power line; and initiating an analysis algorithm when new voltage data is detected for a first meter of the first feeder power line.

The provided is an on-chip voltage prediction circuit based on parameters of the chip's power delivery network. The circuit includes: an on-chip PDN impedance scanning module, an on-chip voltage monitoring module, an on-chip PDN parameter lookup table storage module, an on-chip predictive digital power meter, and an on-chip voltage prediction-calculation module. The circuit establishes a physical model that maps historical voltages and predicted current information to predicted voltage information. By quantizing the model and using the voltage monitoring circuit and the predictive digital power meter together, the provided implements on-chip deployment of the voltage prediction circuit, and effectively predicts future on-chip voltages.