An apparatus is provided which substantially removes a perturbation signal from a pulse density modulated signal representing a combination of a signal to be measured and a perturbation applied to the signal to be measured. The removal of the perturbation is done by subtracting a correcting signal from the pulse density modulated signal. This approach introduces very little delay as it can be implemented by simple logic gates. It also provided enhanced immunity from the effects of bit errors.

A multi-chain measurement circuit is disclosed. The measurement circuit includes first and second chains of serially-connected buffer circuits coupled in parallel, each of which propagates an input signal. A set of storage circuits is configured to store logic values generated by the first and second sets of buffer circuits in response to the transitioning of a clock signal. The logic values stored in the storage circuits result in a digital value indicative of a total number of serially-connected storage circuits through which the input signal has propagated at the time of the transition of the operating clock signal

A multi-chain measurement circuit is disclosed. The measurement circuit includes first and second chains of serially-connected buffer circuits coupled in parallel, each of which propagates an input signal. A set of storage circuits is configured to store logic values generated by the first and second sets of buffer circuits in response to the transitioning of a clock signal. The logic values stored in the storage circuits result in a digital value indicative of a total number of serially-connected storage circuits through which the input signal has propagated at the time of the transition of the operating clock signal

A digital voltmeter, where a number of clock pulses for a first ramp voltage to reach an input voltage is determined. Next, a number of clock pulses for a second ramp voltage to reach the input voltage is determined. One of the first and the second ramp voltages having a least number of clock pulses to reach the input voltage is determined. A determination is made for a number of clock pulses for the determined one of the first and the second ramp voltages to reach a reference voltage. A digital code is generated for the input voltage based on the determined number of clock pulses for reaching the reference voltage and the determined least number of clock pulses for reaching the input voltage.

A digital voltmeter, where a number of clock pulses for a first ramp voltage to reach an input voltage is determined. Next, a number of clock pulses for a second ramp voltage to reach the input voltage is determined. One of the first and the second ramp voltages having a least number of clock pulses to reach the input voltage is determined. A determination is made for a number of clock pulses for the determined one of the first and the second ramp voltages to reach a reference voltage. A digital code is generated for the input voltage based on the determined number of clock pulses for reaching the reference voltage and the determined least number of clock pulses for reaching the input voltage.

A processor includes a plurality of voltage droop detectors positioned at multiple points of a processor. The detectors monitor voltage levels and alert the processor if a droop event has been detected in real time. Multiple droops can be detected simultaneously, with each detected droop event generating an alert that is sent to a processor module, such as a clock control module, to act based on the detected droop. Each detector employs a ring oscillator that generates a periodic signal and a corresponding count based on that signal, where the frequency of the signal varies based on a voltage at the corresponding point being monitored.

An AC voltage detection device has a rectifying circuit configured to rectify an AC voltage output from an AC power source, a voltage-pulse conversion circuit configured to convert a rectified voltage rectified in the rectifying circuit to a first pulse signal having a period shorter than a half of a period of the AC voltage, a pulse transmission circuit configured to perform signal transmission with electrical insulation by converting the first pulse signal to a physical signal other than an electrical signal and converting the physical signal to a second pulse signal being an electrical signal, and a controller to which the second pulse signal is input. The controller calculates the voltage value of the AC voltage from a characteristic value of the second pulse signal.

An AC voltage detection device has a rectifying circuit configured to rectify an AC voltage output from an AC power source, a voltage-pulse conversion circuit configured to convert a rectified voltage rectified in the rectifying circuit to a first pulse signal having a period shorter than a half of a period of the AC voltage, a pulse transmission circuit configured to perform signal transmission with electrical insulation by converting the first pulse signal to a physical signal other than an electrical signal and converting the physical signal to a second pulse signal being an electrical signal, and a controller to which the second pulse signal is input. The controller calculates the voltage value of the AC voltage from a characteristic value of the second pulse signal.

A digital voltmeter, where a number of clock pulses for a first ramp voltage to reach an input voltage is determined. Next, a number of clock pulses for a second ramp voltage to reach the input voltage is determined. One of the first and the second ramp voltages having a least number of clock pulses to reach the input voltage is determined. A determination is made for a number of clock pulses for the determined one of the first and the second ramp voltages to reach a reference voltage. A digital code is generated for the input voltage based on the determined number of clock pulses for reaching the reference voltage and the determined least number of clock pulses for reaching the input voltage.

A digital voltmeter, where a number of clock pulses for a first ramp voltage to reach an input voltage is determined. Next, a number of clock pulses for a second ramp voltage to reach the input voltage is determined. One of the first and the second ramp voltages having a least number of clock pulses to reach the input voltage is determined. A determination is made for a number of clock pulses for the determined one of the first and the second ramp voltages to reach a reference voltage. A digital code is generated for the input voltage based on the determined number of clock pulses for reaching the reference voltage and the determined least number of clock pulses for reaching the input voltage.