A method for nondestructive inspection of ceramic structures present as either a ceramic matrix composite structure or a ceramic based coating. Such non-metallic structures are used to provide thermal protection or weight reduction or both to aircraft and their components. The nonmetallic structure is scanned with an electromagnetic pulse in the range of 200 GHz to 4 THz. The electromagnetic pulse includes a plurality of frequencies within the Terahertz range and is not restricted to a single designated frequency. The frequency range is sensitive to changes in impedances and refractive index within the structure. After the electromagnetic pulse passes through the nonmetallic structure, it may be evaluated for changes in impedance in the nonmetallic structure at different locations, and, when present, whether the changes in impedance impact the ability of the structure to perform the function for which it was designed.

A display may have a substrate layer to which a display driver integrated circuit and flexible printed circuit are bonded. The display driver integrated circuit may be provided with switches and control circuitry for controlling the operation of the switches during bond resistance measurements. Test equipment may apply currents to pads in the display driver integrated circuit through contacts in the flexible printed circuit while controlling the switching circuitry. Based on these measurements and the measurement of trace resistances in a dummy flexible printed circuit, the test equipment may determine bond resistances for bonds between the display driver integrated circuit and the display substrate and between the flexible printed circuit and the display substrate. Displays may have master and slave display driver integrated circuits that share coarse reference voltages produced by the master from raw power supply voltages.

A display may have a substrate layer to which a display driver integrated circuit and flexible printed circuit are bonded. The display driver integrated circuit may be provided with switches and control circuitry for controlling the operation of the switches during bond resistance measurements. Test equipment may apply currents to pads in the display driver integrated circuit through contacts in the flexible printed circuit while controlling the switching circuitry. Based on these measurements and the measurement of trace resistances in a dummy flexible printed circuit, the test equipment may determine bond resistances for bonds between the display driver integrated circuit and the display substrate and between the flexible printed circuit and the display substrate. Displays may have master and slave display driver integrated circuits that share coarse reference voltages produced by the master from raw power supply voltages.

An evaluation jig comprises a pair of female terminals connectable to a pair of male terminals of a charging connector, and an adjustment member that can adjust contact resistance of the female terminal and the male terminal. The female terminal is reducible in diameter. The adjustment member can apply an external force to the female terminal to reduce the female terminal in diameter.

An automatic transfer switch structured to switch between a first power source and a second power source to supply continuous power to a load includes a power switching mechanism including a switch structured to couple the load to one of the first power source and the second power source; a plurality of sensors including a voltage sensor coupled to a joint on first power source side, a voltage sensor coupled to a joint on second power source side, a voltage sensor coupled to a joint on load side, and a current sensor structured to sense current flowing through the switch; and a controller coupled to the power switching device and the plurality of sensors and structured to control operation of the ATS, the controller including a fault identifier structured to detect and identify a fault within the ATS and estimate severity of the fault.

The disclosure includes a method of diagnosing a grounding system of a structure that includes a charge collecting structure conductively connected to the ground via a grounding path, where diagnosing involves an act of monitoring output of a voltage and/or a current and/or an electrostatic detector connected to the grounding path.

A detecting device for detecting a usage state of a socket includes a carrier, a movable assembly and a conductivity detecting module. The carrier has a first plug hole and a second plug hole. The movable assembly is movably disposed in the carrier. The conductivity detecting module is disposed on the carrier. The movable assembly is moved for exposing the first plug hole and the second plug hole by an external pushing force, and a detecting signal of the socket in-use is generated by the conductivity detecting module according to movement of the movable assembly.

A test device includes a diode junction layer having a first dopant conductivity region and a second dopant conductivity region formed within the diode junction layer on opposite sides of a diode junction. A first portion of vertical transistors is formed over the first dopant conductivity region as a device under test, and a second portion of vertical transistors is formed over the second dopant conductivity region. A common source/drain region is formed over the first and second portions of vertical transistors. Current through the first portion of vertical transistors permits measurement of a resistance at a probe contact connected to the common source/drain region.

A stainless steel having a low surface contact resistance for fuel cell separators is provided. The stainless steel has a Cr content of 16 to 40 mass % or more. The stainless steel includes a region having a fine textured structure on its surface, and the area percentage of the region is 50% or more, preferably 80% or more. The region having a fine textured structure is a region which has a structure having depressed portions and raised portions at an average interval between depressed portions or raised portions of 20 nm or more and 150 nm or less when observed with a scanning electron microscope.

A semiconductor test structure includes a first transistor active area comprising at least a first source/drain region, and a second transistor active area stacked on the first transistor active area and comprising at least a second source/drain region. At least one dielectric layer is disposed between the first transistor active area and the second transistor active area. The semiconductor test structure further includes a plurality of contact structures spaced apart from each other and disposed on the second source/drain region, and at least one gate structure extending across the first transistor active area and the second transistor active area. Contact resistance is measured between respective ones of the plurality of contact structures and the second source/drain region, and the second source/drain region is continuous between the plurality of contact structures.