A method for in situ threshold voltage determination of a semiconductor device includes sourcing a current to a first terminal of the semiconductor device. A gate terminal of the semiconductor device is driven with a plurality of gate levels. Each gate level includes one of a plurality of different gate voltages. A transistor voltage is measured between the first terminal and a second terminal of the semiconductor device during each gate level. The respective gate voltage is stored in response to the semiconductor device voltage transitioning past a voltage limit. A temperature dependent threshold voltage of the semiconductor device is estimated for a first measured temperature measured during the storing of the stored gate voltage from a previously stored gate voltage and a second measure temperature.

In some examples, this disclosure describes a method of operating a circuit. The method may comprise performing a circuit function under normal operating conditions, wherein performing the circuit function under the normal operating conditions includes performing at least a portion of the circuit functions via a characteristic circuit, performing at least the portion of the circuit function under enhanced stress conditions via a characteristic circuit replica, and predicting a potential future problem with the circuit function under the normal conditions based on an evaluation of operation of the characteristic circuit relative to operation of the characteristic circuit replica.

An aspect relates to an apparatus including a set of one or more receivers; a first replica circuit being a substantial replica of at least a portion of one of the set of one or more receivers; a first control circuit generates an output signal selectively coupled to an input of the first replica circuit; a second replica circuit being a substantial replica of at least a portion of one of the set of one or more receivers; a comparator including a first input coupled to a first output of the first replica circuit, a second input coupled to a second output of the second replica circuit, and an output; and a second control circuit including an input coupled to the output of the comparator, and an output coupled to the first replica circuit and to the set of one or more receivers.

A driver device includes: a voltage terminal; a ground terminal; an output terminal; a first nMOS power transistor having a drain electrically connected to the voltage terminal, a source electrically connected to the output terminal, and a gate; an overvoltage protection circuit configured to limit a gate-to-source voltage of the first nMOS power transistor in a normal operating mode for the driver device; a pulldown circuit configured to force the first nMOS power transistor off in a stress test mode for the driver device; and a blocking circuit configured to block current flow from the output terminal to the ground terminal through the overvoltage protection circuit and the pulldown circuit in the stress test mode. A method of stress testing the driver device is also described.

A method for detecting the aging of a power electronic device that comprises at least one semiconductor component including a step of providing of an excitation signal, which is designed to trigger a flow of an at least approximately semi-sinusoidal excitation current through the semiconductor component in order to introduce a power loss into the semiconductor component, a step of uploading a temperature signal, which represents the temporal course of the temperature of the semiconductor component, and a step of determining of an aging value that represents the aging of the power electronic device by using the temperature signal.

A method for determining the remaining usability of a semiconductor module in normal use. The semiconductor module is thermally coupled to a cooling device. A predefined electrical load is applied to the semiconductor module while predefined cooling is effected by the cooling device. A temperature of a semiconductor element of the semiconductor module is sensed at least for the predefined electrical load on the semiconductor module. The sensed temperature is compared with a comparison temperature in a first comparison. The comparison temperature is assigned to the predefined electrical load with the predefined cooling, and prediction data for the remaining usability of the semiconductor module in normal use up to a usability end are determined at least in accordance with the first comparison.

The present disclosure provides a method and a system for testing semiconductor device. The method includes providing a device under test (DUT) having an input terminal and an output terminal; applying a voltage having a first voltage level to the input terminal of the DUT during a first period; applying a stress signal to the input terminal of the DUT during a second period subsequent to the first period; obtaining an output signal in response to the stress signal at the output terminal of the DUT; and comparing the output signal with the stress signal. The stress signal includes a plurality of sequences, each having a ramp-up stage and a ramp-down stage. The stress signal has a second voltage level and a third voltage level.

A method for characterizing a fluctuation induced by single particle irradiation in a device. A plurality of devices varying in size are tested respectively before and after irradiation to obtain threshold voltage distribution, such that a threshold voltage fluctuation induced by irradiation is obtained and used to correct a process fluctuation model, so as to correct a design margin of the devices working under the irradiation.

To facilitate a reliable detection of age-related damage or delamination on components the following is proposed: [i] within the scope of radiofrequency reflectometry, scanning a component by radiofrequency signal irradiation in the micrometer or millimeter wavelength range and by measuring at least one reflection signal, which was reflected at the component, in punctiform, one-dimensional or two-dimensional fashion for the purposes of generating at least one first radiofrequency image representation; [ii] scanning the component in direct time offset fashion with respect to the radiofrequency signal irradiation by a combination of ultrasonic signal irradiation and the radiofrequency signal irradiation in the micrometer or millimeter wavelength range and by measuring at least one further reflection signal, which was reflected at the component; and [iii] comparing the radiofrequency image representations generated based on the reflection signals, wherein determined changes in the radiofrequency image representations indicate damage or delamination on the component.

The present application discloses a method and apparatus for calculating the kink current of SOI device, which is used to solve the problem that the kink current calculation in the prior art is not accurate and is not suitable for circuit simulation. The method includes: obtaining the impact ionization factor, the parasitic transistor effect factor, and the drain saturation current of the SOI device respectively; and calculating the kink current of the SOI device according to the impact ionization factor, the parasitic transistor effect factor, and the drain saturation current.