The disclosed technology relates generally to semiconductor devices, and more particularly to semiconductor devices including a metal-oxide-semiconductor (MOS) transistor and are configured for accelerating and monitoring degradation of the gate dielectric of the MOS transistor. In one aspect, a semiconductor device configured with gate dielectric monitoring capability comprises a metal-oxide-semiconductor (MOS) transistor including a source, a drain, a gate, and a backgate region formed in a semiconductor substrate. The semiconductor device additionally comprises a bipolar junction transistor (BJT) including a collector, a base, and an emitter formed in the semiconductor substrate, wherein the backgate region of the MOS transistor serves as the base of the BJT and is independently accessible for activating the BJT. The MOS transistor and the BJT are configured to be concurrently activated by biasing the backgate region independently from the source of the MOS transistor, such that the base of the BJT injects carriers of a first charge type into the backgate region of the MOS transistor, where the first charge type is opposite charge type to channel current carriers.

An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.

An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.

The present application relates to a test circuit, comprising: M stages of test units, first terminals of test units in each stage being all connected to a power wire, second terminals of test units in each stage being all connected to a ground wire, third terminals of test units in the first stage being connected to the power wire, and third terminals of test units in the i.sup.th stage being connected to fourth terminals of test units in the (i1).sup.th stage; wherein, the M and i are positive integers greater than or equal to 2.

Methods and systems for measuring degradation includes measuring an initial electrical characteristic of a test device in a ring oscillator that includes multiple oscillator stages and a test stage having a delay stage and the test device. The ring oscillator is operated for a period of time. The electrical characteristic of the test device is measured after operating the ring oscillator. A level of degradation in the test device is determined using a processor based on the measurements of the electrical characteristic of the test device.

The present invention concerns a method and a device (10) for monitoring a multi-die power module (15) comprising dies that are in a half-bridge switch configuration. The invention: sets the dies in a non conductive state, selects one die which is blocking a voltage, injects a current in a gate of the selected die in order to charge an input parasitic capacitance of the selected die, monitors a voltage that is representative of a voltage on the gate of the selected die, memorizes the value of the monitored voltage when the value of the monitored voltage is stabilized.

The present disclosure provides a method for controlling a junction temperature of a device under test, including applying a reverse bias to a reference diode adjacent to the device under test, obtaining a calibration current of the reference diode under the reverse bias, deriving the junction temperature of the device under test according to the reference diode, and adjusting an environment temperature when the junction temperature of the device under test is deviated from a predetermined value by a predetermined temperature range.

The test circuit monitoring positive bias temperature instability (PBTI) includes a PBTI monitoring unit driven according to a power voltage, the PBTI monitoring unit outputting an output voltage having a potential that is equal to or lower than a potential of the power voltage according to a PBTI degradation rate of an NMOS transistor; and a degradation determiner for determining the PBTI degradation rate by comparing the potential of the output voltage to the potential of the power voltage.

A multi-die health monitoring device: sets, at a given current provided to the load by the group of dies, one of the dies in a non-conducting state (NCS), obtains, when the die is in the NCS, a signal that is representative of the temperature of the die and determines the temperature of the die, obtains, when the die is in the NCS, a signal that is representative of an on-state voltage (OSV) of the die and determines the OSV of the die, retrieves in a table stored in a memory of the multi-die health monitoring device, an OSV that corresponds to the given current and the determined temperature of the die, notifies that the multi-die power module has to be replaced, if the difference between the determined OSV of the die and the retrieved OSV is equal or upper than a predetermined value.

Provided is a method of inspecting pixels. The method includes the step of applying a switching signal to gate electrodes of inspection transistors and the step of applying an inspection data signal to one or more of source electrodes of the inspection transistors. A voltage applied to the gate electrodes is controlled under the switching signal and the inspection data signal.