Patent classifications
G01R31/2646
Synchronized noise measurement system
Embodiments of apparatuses of a synchronized noise measurement system and methods for using the same are disclosed. In one embodiment, a method of performing noise measurement includes setting up a plurality of device under tests (DUTs), performing noise measurement of the plurality of DUTs synchronously using programmable testing parameters to generate a noise measurement data, collecting the noise measurement data from the plurality of DUTs in parallel, and analyzing the noise measurement data collected to identify deviations in noise performance caused by manufacturing process variations or environmental variations for the plurality of DUTs.
NOISE MONITORING APPARATUS, NOISE MONITORING SYSTEM AND A NOISE MONITORING METHOD
A noise monitoring apparatus includes a row selection circuit, a direct current (DC) cancellation circuit and an amplifier circuit. The row selection circuit selects a row of a DUT array to be a selected row during a readout period, wherein the selected row comprises a plurality of selected DUTs. The DC cancellation circuit is coupled to unselected DUTs of the DUT array during the readout period, generates a DC current signal based on bias current signals from a group of unselected DUTs and subtract the DC current signal from a first noise signal of the selected DUT to generate a second noise signal. The amplifier circuit is coupled to the plurality of selected DUTs of the selected row during the readout period, and amplifies the second noise signal from each of the selected DUTs to generate an output signal.
Computing device executing program performing method of analyzing power noise in semiconductor device, semiconductor device design method, and program storage medium storing program
A method of analyzing power noise in a semiconductor device includes; generating modified current information by modifying present current information based on a previous analysis result, updating a current vector based on the modified current information, and generating a present analysis result by calculating a voltage vector from the updated current vector.
Slave BMS inspection system and method
A master battery management system (BMS) used for a battery system in which a plurality of slave BMSs and the master BMS communicate wirelessly includes: a receiving unit configured to receive, from each slave BMS, data of the corresponding slave BMS and data transmission information of at least one other slave BMS except for the corresponding slave BMS among the plurality of slave BMS during one period in which each of the plurality of slave BMSs transmits data at least once; and a determination unit configured to determine a communication error or an abnormal slave BMS by using the data of the corresponding slave BMS and the at least one other slave BMS data received from each slave BMS during one period. The data transmission information of the at least one other slave BMS is information on a history that the other slave BMS transmits data.
Slave BMS Inspection System and Method
A master battery management system (BMS) used for a battery system in which a plurality of slave BMSs and the master BMS communicate wirelessly includes: a receiving unit configured to receive, from each slave BMS, data of the corresponding slave BMS and data transmission information of at least one other slave BMS except for the corresponding slave BMS among the plurality of slave BMS during one period in which each of the plurality of slave BMSs transmits data at least once; and a determination unit configured to determine a communication error or an abnormal slave BMS by using the data of the corresponding slave BMS and the at least one other slave BMS data received from each slave BMS during one period. The data transmission information of the at least one other slave BMS is information on a history that the other slave BMS transmits data.
Noise monitoring apparatus, noise monitoring system and a noise monitoring method
A noise monitoring apparatus includes a row selection circuit, a direct current (DC) cancellation circuit and an amplifier circuit. The row selection circuit selects a row of a DUT array to be a selected row during a readout period, wherein the selected row comprises a plurality of selected DUTs. The DC cancellation circuit is coupled to unselected DUTs of the DUT array during the readout period, generates a DC current signal based on bias current signals from a group of unselected DUTs and subtract the DC current signal from a first noise signal of the selected DUT to generate a second noise signal. The amplifier circuit is coupled to the plurality of selected DUTs of the selected row during the readout period, and amplifies the second noise signal from each of the selected DUTs to generate an output signal.
COMPUTING DEVICE EXECUTING PROGRAM PERFORMING METHOD OF ANALYZING POWER NOISE IN SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE DESIGN METHOD, AND PROGRAM STORAGE MEDIUM STORING PROGRAM
A method of analyzing power noise in a semiconductor device includes; generating modified current information by modifying present current information based on a previous analysis result, updating a current vector based on the modified current information, and generating a present analysis result by calculating a voltage vector from the updated current vector.
Synchronized Noise Measurement System
Embodiments of apparatuses of a synchronized noise measurement system and methods for using the same are disclosed. In one embodiment, a method of performing noise measurement includes setting up a plurality of device under tests (DUTs), performing noise measurement of the plurality of DUTs synchronously using programmable testing parameters to generate a noise measurement data, collecting the noise measurement data from the plurality of DUTs in parallel, and analyzing the noise measurement data collected to identify deviations in noise performance caused by manufacturing process variations or environmental variations for the plurality of DUTs.
Computing device executing program performing method of analyzing power noise in semiconductor device, semiconductor device design method, and program storage medium storing program
A method of analyzing power noise in a semiconductor device includes; generating modified current information by modifying present current information based on a previous analysis result, updating a current vector based on the modified current information, and generating a present analysis result by calculating a voltage vector from the updated current vector.
Method for monitoring degradation mechanism of switch device in power conversion circuit
In a method for monitoring a degradation mechanism of a switch device in a power conversion circuit. When individually determining the degradation mechanism of internal defects of the switch device, it is determined through a change trend of a real-time current change rate that internal defect degradation is caused by an increase of an oxide layer defect density or an interface defect density. It is confirmed through a decrease in the real-time current change rate that internal defect degradation is caused by the increase of the oxide layer defect density. When the real-time current change rate increases, it is determined through a secondary testing including the on-state resistance and low-frequency noise testing that degradation is caused by accurate packaging and/or the increase of the interface defect density.