A reliability measuring apparatus includes an oxide-nitride-oxide-alumina (ONOA) current measuring circuit configured to measure an ONOA current by applying an ONOA current measuring voltage to a selected word line coupled to a selected memory cell in a flash memory and a reliability indicator generator configured to a reliability indicator using the ONOA current measured through the measuring circuit.

A photocurrent scanning system comprises a laser generating device, a focusing device, a displacement adjustment device, a bias supply device, and a measuring device. The laser generating device is used to emit a laser. The focusing device is used to focus the laser to a surface of a sample. The displacement adjustment device is used to place the sample and adjust a position of the sample, to make the laser focused onto different parts of the surface of the sample. The bias supply device is used to supply a voltage to the sample. The measuring device is used to measure a photocurrent signal flowing through the sample.

A method for characterizing a semiconductor sample, said method comprising: shining light on one or more points in said semiconductor sample; measuring one or more voltage decay curves corresponding to said shining of light on said one or more points in said semiconductor sample; extracting one or more intermediate voltage decay curves corresponding to one or more measured voltage decay curves; obtaining one or more normalized decay curves corresponding to one or more intermediate voltage decay curves, each of the said one or more normalized decay curves corresponding to one or more discrete estimates of survival functions; and analyzing said obtained one or more normalized decay curves, said analyzing comprising obtaining one or more discrete estimates of the probability of recombination corresponding to the one or more normalized decay curves, and computing one or more summary statistics corresponding to each of said obtained one or more discrete estimates.

[Object] To provide a semiconductor device capable of improving a discharge starting voltage when measuring electric characteristics, and widening a pad area of a surface electrode or increasing the number of semiconductor devices (number of chips) to be obtained from one wafer, and a method for manufacturing the same.

[Solution Means] A semiconductor device 1 includes an n-type SiC layer 2 having a first surface 2A, a second surface 2B, and end faces 2C, a p-type voltage relaxing layer 7 formed in the SiC layer 2 so as to be exposed to the end portion of the first surface 2A of the SiC layer 2, an insulating layer 8 formed on the SiC layer 2 so as to cover the voltage relaxing layer 7, and an anode electrode 9 that is connected to the first surface 2A of the SiC layer 2 through the insulating layer 8 and has a pad area 95 selectively exposed.

The present invention provides a semiconductor film layer inspection apparatus (10) for detecting the electrical characteristics of a semiconductor film layer (30) formed on one surface of a substrate (20) and including an oxide semiconductor layer (31), and a detection unit used therein. The apparatus includes a base unit (40), a detection unit (200) and a carrier generator (300 300a and 300b). The detection unit (200) includes: a detection probe pin (230) and a detection probe module (202). The detection probe pin (230) includes a detection probe pin body (231) and a detection probe pin contactor unit (233). The detection probe pin contactor unit at least partially forms a plurality of independently detectable and operable segmented pin contactor unit blocks.

Multiple pin probes and methods for controlling such multiple pin probes to support parallel measurements are disclosed. The method may include: establishing electrical contact between a multiple pin probe and a subject of measurement; selecting two pins out of a plurality of pins included in the multiple pin probe as current-carrying pins; selecting more than two additional pins out of the plurality of pins included in the multiple pin probe as voltage-metering pins; injecting a current through the current-carrying pins; simultaneously measuring voltage signals through the voltage-metering pins; calculating a simulated voltage distribution curve at least partially based on the voltage signals simultaneously measured through the voltage-metering pins; and determining one or more processor monitor parameters of the subject of measurement at least partially based on the simulated voltage distribution curve.

Methods, tools and systems for full characterization of thin and ultra-thin layers employed in advanced semiconductor device structures are disclosed.

In a method for obtaining the equivalent oxide thickness of a dielectric layer, a first semiconductor capacitor including a first silicon dioxide layer and a second semiconductor capacitor including a second silicon dioxide layer are provided and a modulation voltage is applied to the semiconductor capacitors to measure a first scanning capacitance microscopic signal and a second scanning capacitance microscopic signal. According to the equivalent oxide thicknesses of the silicon dioxide layers and the scanning capacitance microscopic signals, an impedance ratio is calculated. The modulation voltage is applied to a third semiconductor capacitor including a dielectric layer to measure a third scanning capacitance microscopic signal. Finally, the equivalent oxide thickness of the dielectric layer is obtained according to the equivalent oxide thickness of the first silicon dioxide layer, the first scanning capacitance microscopic signal, third scanning capacitance microscopic signal, and the impedance ratio.

A semiconductor device inspection apparatus according to embodiments comprises: an action unit that generates an internal stress in a predetermined direction in a semiconductor device; a stress controller that controls a magnitude of the internal stress generated in the semiconductor device by the action unit; a probe electrically connected to the semiconductor device; a probe controller that supplies a current to the semiconductor device via the probe; and a controller that screens the semiconductor device based on a first current flowing through the semiconductor device via the probe while the internal stress is not generated in the semiconductor device and a second current flowing through the semiconductor device via the probe while the action unit generates the internal stress in the semiconductor device.

A system and a method determine a quality of a doped semiconductor layer in terms of a charge carrier density gradient by measuring two magnetic-field-dependent resistances using four contacts of a specimen.