A system and method for rotary motion with vacuum sealing is provided. The system includes a vacuum chamber, a component mount disposed in the vacuum chamber, and a base. A bellows is disposed between the base and the component mount, and the bellows provides a seal between the base and the component mount. The bellows, the base, and the component mount define an actuator compartment therebetween. An actuator is disposed in the actuator compartment. The actuator is configured to rotate the component mount relative to the base in order to align a component disposed on the component mount. Rotation of the component mount relative to the base causes torsional elastic deformation of the bellows.

The present disclosure provides a dual-sided wafer imaging apparatus and methods thereof. The dual-sided wafer imaging apparatus includes one or more load ports, one or more mechanical arms for transporting a wafer, a wafer transfer stage, a first line scan camera mounted below the wafer transfer stage, a second line scan camera mounted above the wafer transfer stage, a first optical lens mounted on the first line scan camera, a second optical lens mounted on the second line scan camera, and line light sources respectively mounted below and above the wafer transfer stage. The load ports are configured for an automated load operation or unload operation of a wafer pod of an automated transport equipment. The wafer transfer stage includes vacuum suction points in contact with a backside of the wafer, and the wafer transfer stage further includes a drive motor producing a linear reciprocating motion for moving the wafer.

Various approaches can be used to interrogate a surface such as a surface of a layered semiconductor structure on a semiconductor wafer. Certain approaches employ Second Harmonic Generation and in some cases may utilize pump and probe radiation. Other approaches involve determining current flow from a sample illuminated with radiation. Decay constants can be measured to provide information regarding the sample. Additionally, electric and/or magnetic field biases can be applied to the sample to provide additional information.

A structure and method for providing a housing which includes a high frequency (HF or RF) connection between a device under test (DUT) having a waveguide 22. The waveguide includes a wave insert 22, and a conductive compliant member 40 which maintains bias between the adapter/insert 22 and the DUT HF port 20 while also maintaining an RF shield despite the variable height of the DUT waveport. A passage 50 provides an RF connection between the RF port 62 on the DUT and a RF wave guide horn 54. A plurality of transmitting horns 54 can be arranged to transmit to a single receiving horn 154 so that fewer receivers are required to test multiple DUTs in sequence.

A device for converting electrical energy, including at least one switching-type semiconductor component, a cooling path for cooling the semiconductor component, and a device for determining a degradation of the cooling path based on a current having a predetermined current intensity that flows through the component. The device provides that the semiconductor component includes an optically active semiconductor material, which generates light having a brightness that is dependent on a temperature of the semiconductor component when the semiconductor component is traversed by current having a predetermined current intensity, and the device for determining the degradation includes a brightness sensor for recording the brightness of the generated light. The device has the advantage that the device for determining the degradation and the component are inherently galvanically isolated, and the degradation can be determined at a high resolution.

Various embodiments are described that relate to failure determination for an integrated circuit. An integrated circuit can be tested to determine if the integrated circuit is functioning properly. The integrated circuit can be subjected to a specific radiation such that the integrated circuit produces a response. This response can be compared against an expected response to determine if the response matches the expected response. If the response does not match the expected response, then the integrated circuit fails the test. If the response matches the expected response, then the integrated circuit passes the test.

The invention relates to an integrated circuit with an active transistor area and a plurality of wiring layers arranged above the active transistor area. At least one optical device is integrated in the active transistor area. The optical device is electrically connected with at least one of the wiring layers. At least one optical tunnel extends from the at least one optical device through the plurality of wiring layers to a surface of an uppermost wiring layer of the plurality of wiring layers facing away from the active transistor area.

An embodiment includes a light source that generates measurement light including a first wavelength, a light source that generates stimulation light including a second wavelength, an optical coupling unit that is a WDM optical coupler including optical fibers branched between an output end and input ends, the input ends being optically coupled to an output of the light sources, and the WDM optical coupler combining the measurement light with the stimulation light and outputting the combination light from the output end, a photodetector that detects an intensity of reflected light from a DUT, a light irradiation and guide system that guides the combination light toward a measurement point on the DUT and guides the reflected light from the measurement point toward the photodetector, and a galvanometer mirror that moves the measurement point, and the optical fibers propagate light in a single mode for the first wavelength.

An inspection device includes a reference signal output section, a noise removal section, and an electrical characteristic measurement section. The reference signal output section is connected to an external power supply device in electrical parallel with a semiconductor sample, and outputs a reference signal according to the output of the external power supply device. The noise removal section outputs a noise removal signal obtained by removing a noise component of the output of the external power supply device from the current signal output from the semiconductor sample based on the reference signal. The electrical characteristic measurement section measures the electrical characteristic of the semiconductor sample based on the noise removal signal. The inspection device measures the electrical characteristic of the semiconductor sample to which a voltage is being applied by the external power supply device and which is being irradiated and scanned with light. The inspection device outputs a defective portion of the semiconductor sample based on the electrical characteristic.

Various approaches to can be used to interrogate a surface such as a surface of a layered semiconductor structure on a semiconductor wafer. Certain approaches employ Second Harmonic Generation and in some cases may utilize pump and probe radiation. Other approaches involve determining current flow from a sample illuminated with radiation.