There is provided an intermediate connection member provided between a first member having a plurality of first terminals and a second member having a plurality of second terminals to electrically connect the plurality of first terminals and the plurality of second terminals, respectively. The intermediate connection member includes: a block member including connection members configured to electrically connect the plurality of first terminals and the plurality of second terminals, respectively; a frame member having an insertion hole into which the block member is inserted; and an electronic component electrically connected to one of the connection members.

A bonded structure is disclosed. The bonded structure can include a first element that has a first plurality of contact pads. The first plurality of contact pads includes a first contact pad and a second redundant contact pad. The bonded structure can also include a second element directly bonded to the first element without an intervening adhesive. The second element has a second plurality of contact pads. The second plurality of contact pads includes a third contact pad and a fourth redundant contact pad. The first contact pad is configured to connect to the third contact pad. The second contact pad is configured to connect to the fourth contact pad. The bonded structure can include circuitry that has a first state in which an electrical signal is transferred to the first contact pad and a second state in which the electrical signal is transferred to the second contact pad.

Metal-free frame designs for silicon bridges for semiconductor packages and the resulting silicon bridges and semiconductor packages are described. In an example, a semiconductor structure includes a substrate having an insulating layer disposed thereon, the substrate having a perimeter. A metallization structure is disposed on the insulating layer, the metallization structure including conductive routing disposed in a dielectric material stack. A first metal guard ring is disposed in the dielectric material stack and surrounds the conductive routing. A second metal guard ring is disposed in the dielectric material stack and surrounds the first metal guard ring. A metal-free region of the dielectric material stack surrounds the second metal guard ring. The metal-free region is disposed adjacent to the second metal guard ring and adjacent to the perimeter of the substrate.

A test structure for measuring static noise margin (SNM) for one or more static random access memory (SRAM) cells can include a first transistor gate (TG) and a second TG electrically coupled to each SRAM cell. In an implementation, an interconnect between an output of a first inverter and an input of a second inverter of the SRAM cell can be electrically disconnected using a cut off. During operation of the SRAM cell, internal storage nodes within the SRAM cell can be electrically coupled through the first TG and the second TG to, for example, external pins and to a test fixture. Electrical parameters such as voltage can be measured at the internal storage nodes through the external pins and used to calculate SNM of the SRAM cell.

A method of obtaining contact resistance values of a semiconductor package, the semiconductor package includes a package substrate, a semiconductor chip mounted on the package substrate, a molding member disposed on the package substrate to surround the semiconductor chip, and an electromagnetic interference (EMI) shielding layer disposed on side surfaces of the package substrate and on the molding member. The package substrate includes a substrate body having a first surface and a second surface which are opposite to each other, first to fourth upper interconnection patterns disposed on the first surface of the substrate body in a first region of the package substrate and in contact with the EMI shielding layer, and an interconnection structure disposed in a second region of the package substrate.

A method of obtaining contact resistance values of a semiconductor package, the semiconductor package includes a package substrate, a semiconductor chip mounted on the package substrate, a molding member disposed on the package substrate to surround the semiconductor chip, and an electromagnetic interference (EMI) shielding layer disposed on side surfaces of the package substrate and on the molding member. The package substrate includes a substrate body having a first surface and a second surface which are opposite to each other, first to fourth upper interconnection patterns disposed on the first surface of the substrate body in a first region of the package substrate and in contact with the EMI shielding layer, and an interconnection structure disposed in a second region of the package substrate.

Described herein are a system and method of preparing integrated circuits (ICs) so that the ICs remain electrically active and can have their active circuitry probed for diagnostic and characterization purposes using charged particle beams. The system employs an infrared camera capable of looking through the silicon substrate of the ICs to image electrical circuits therein, a focused ion beam system that can both image the IC and selectively remove substrate material from the IC, a scanning electron microscope that can both image structures on the IC and measure voltage contrast signals from active circuits on the IC, and a means of extracting heat generated by the active IC. The method uses the system to identify the region of the IC to be probed, and to selectively remove all substrate material over the region to be probed using ion bombardment, and further identifies endpoint detection means of milling to the required depth so as to observe electrical states and waveforms on the active IC.

Described herein are a system and method of preparing integrated circuits (ICs) so that the ICs remain electrically active and can have their active circuitry probed for diagnostic and characterization purposes using charged particle beams. The system employs an infrared camera capable of looking through the silicon substrate of the ICs to image electrical circuits therein, a focused ion beam system that can both image the IC and selectively remove substrate material from the IC, a scanning electron microscope that can both image structures on the IC and measure voltage contrast signals from active circuits on the IC, and a means of extracting heat generated by the active IC. The method uses the system to identify the region of the IC to be probed, and to selectively remove all substrate material over the region to be probed using ion bombardment, and further identifies endpoint detection means of milling to the required depth so as to observe electrical states and waveforms on the active IC.

An electrical equipment includes a first load configured for a nominal use of the equipment, at least one first metal screen, a sensor configured to measure a quantity characteristic of the first load, and a power supply conductor, wherein the first load and the at least first metal screen are linked electrically to the power supply conductor, and in that the equipment also comprises a comparator configured to compare measurements from the sensor to detect a dormant failure of the at least first metal screen.

Metal-free frame designs for silicon bridges for semiconductor packages and the resulting silicon bridges and semiconductor packages are described. In an example, a semiconductor structure includes a substrate having an insulating layer disposed thereon, the substrate having a perimeter. A metallization structure is disposed on the insulating layer, the metallization structure including conductive routing disposed in a dielectric material stack. A first metal guard ring is disposed in the dielectric material stack and surrounds the conductive routing. A second metal guard ring is disposed in the dielectric material stack and surrounds the first metal guard ring. A metal-free region of the dielectric material stack surrounds the second metal guard ring. The metal-free region is disposed adjacent to the second metal guard ring and adjacent to the perimeter of the substrate.