The present application discloses a display panel detection method and detection device. The detection method includes steps of: sending at least one to-be-detected panel to a first detection machine for detection; and sending the at least one to-be-detected panel to a second detection machine for second detection; and returning the at least one to-be-detected panel to a corresponding cassette.

A fault monitoring method is executed by a monitoring device in a fault monitoring system that includes a terminal used by a user, an appliance to be operated by the user, the monitoring device, and a plurality of authentication servers each including a distributed ledger, and includes: obtaining event information stored in the plurality of authentication servers and indicating an event generated in response to a request that includes a processing instruction for the user operating the appliance; obtaining state information indicating whether the appliance is faulty, from the appliance; generating first transaction data including the state information obtained and transmitting the first transaction data to the plurality of authentication servers; and transmitting the processing instruction included in the event information to the appliance, when the appliance is determined to be not faulty from the state information.

A detection and protection circuit includes: a comparator, six resistors, and two diodes. A first resistor is connected to a second resistor. The second resistor (30) is grounded. A positive input end, a negative input end, a power supply end, a ground end, and an output end of the comparator are connected to a third resistor, a fourth resistor, a power management device power supply pin, the ground, and a main controller. The other end of the third resistor is connected between the first resistor and the second resistor. The other end of the fourth resistor is connected to the first resistor. A first power supply is connected between the fourth resistor and the first resistor. A fifth resistor is connected to a sixth resistor. The sixth resistor (70) is grounded. The other end of the fifth resistor is connected to the main controller.

Cochlear implant systems can include a cochlear electrode and a stimulator in electrical communication with the cochlear electrode. The stimulator can be in communication with a controller, which is in communication with a testing circuit and a switching network. The stimulator can include a plurality of source elements. The controller can control the switching network to place the plurality of source elements into communication with the testing circuit. The controller can further cause one of the plurality of source elements to emit an electrical current and can determine an amount of electrical current emitted from the source element using the testing circuit. The controller can compare the determined amount of electrical current emitted by the source element with a prescribed current. The controller can adjust the output of each of the plurality of source elements based on the determined amount of electrical current emitted by the stimulator.

An electronic monitoring circuit for detecting a variation in the power or current absorbed by an electronic circuit under test is disclosed. The circuit includes an input terminal adapted to receive a pulse-width modulation control signal, a resistor having a first terminal connected to the input terminal, and a capacitor having a first terminal connected to a second terminal of the resistor. The output terminal is adapted to generate an output signal as a function of the value of the voltage drop at the ends of the capacitor, said output signal being representative of a variation of the pulse width of the pulse-width modulation control signal. The variation of the pulse width is a function of the power or current absorbed by the electronic circuit under test.

A failure detector circuit of one embodiment acquires a first signal while transmitted from a first circuit to a second circuit and acquires a second signal while transmitted from the second circuit to a third circuit. The second circuit is located between the first circuit and the third circuit and transmits, to the third circuit, as the second signal, the first signal or a third signal having a given fixed state. The failure detector circuit outputs a fourth signal indicating detection or non-detection of a failure in the second circuit, in accordance with the first signal and the second signal.

This application discloses an electrical control device detection circuit, a detection method, and an electric vehicle. The detection circuit includes a drive circuit configured to detect an electrical control device. The drive circuit includes a drive power module, a high-side switch unit, and a low-side switch unit. The detection circuit includes: a detection power module, a first switch module, a second switch module, a first detection module, a second detection module, and a control module. The control module is configured to obtain an electrical signal at a third end of the first detection module and/or an electrical signal at a second end of the second detection module; and determine, based on the electrical signal at the third end of the first detection module and/or the electrical signal at the second end of the second detection module, whether a fault occurs in the drive circuit of the electrical control device.

An electric circuit for testing a power-on reset circuit. The electric circuit including a comparator, which is configured to detect an undervoltage for an input voltage to be compared to a reference voltage and to output an output signal, a first noise filter for filtering out noise from the output signal received as a first input signal for a first time period and for outputting a first filtered output signal of a second noise filter for filtering out noise from a second input signal for a second time period, and for outputting a second filtered output signal, and a digital part having an OR gate for the logical linkage of a first filtered output signal and a second filtered output signal for the output of a power-on reset signal.

A test system includes a plurality of test core devices and a plurality of first buses. The plurality of test core devices are electrically connected to a device under test (DUT). The plurality of first buses are electrically connected to the test core devices, where at least one set of test core devices selected from the plurality of test core devices are merged to be a merged test core device through one or more of the plurality of first buses.

An automatic testing system includes a platform; a carrier fixed on a surface of the platform for carrying a device under test (DUT); a function test module for testing functions of the DUT; and a shifting module for shifting the function test module.