A tester including an interface configured to interface with an electronic device and a logic circuit. The logic circuit includes a pattern generator and at least one finite-state machine and is configured to sequentially acquire read data from the electronic device at sequential testing points of a testing range for evaluating an operating parameter of the electronic device or the tester until a set of consecutive passing points having a first passing point and a last passing point is identified, in response to identifying the first passing point, write data within the logic circuit of the tester identifying the first passing point, in response to identifying the last passing point, write data within the logic circuit of the tester identifying the last passing point, and output only data identifying the first passing point and data identifying the last passing point to a software application.

An electrochemical storage diagnostic system is configured to perform an electrical test to measure energy storage device parameters. The diagnostic system includes a charge management controller, electrically coupled to a power multiplexer, a power converter circuit, and an isolated converter circuit. The charge management controller is programmed with instructions to identify a device under test, selected from at least one member of the plurality of energy storage devices to perform an electrical test. Then, adjust a charge in the secondary energy storage device to a target voltage through the power multiplexer by transferring energy between the secondary energy storage device and a support device, selected from at least one member of the plurality energy storage devices. After that, transfer electrical power through the power multiplexer and power converter circuit to the device under test in order to perform the electrical test. Finally, complete the electrical test.

An electronic component testing apparatus is used for testing a device under test (DUT). The electronic component testing apparatus includes: a socket unit that is electrically connected to the DUT; a first wiring board; and a tester that comprises a test head in which the first wiring board is mounted. The socket unit includes a first socket and a second socket. The second socket includes a base and a test antenna unit. The tester tests the DUT by transmitting and receiving radio waves between a device antenna unit of the DUT and the test antenna unit while the DUT is electrically connected to the first socket and the first socket is electrically connected to the test head through the second socket.

Obtaining a periodic test signal, sampling the periodic test signal using a sampling element according to a sampling clock to generate a sampled periodic output, the sampling element operating according to a supply voltage provided by a voltage regulator, the voltage regulator providing the supply voltage according to a supply voltage control signal, comparing the sampled periodic output to the sampling clock to generate a clock-to-Q measurement indicative of a delay value associated with the generation of the sampled periodic output in response to the sampling clock, generating the supply voltage control signal based at least in part on an average of the clock-to-Q measurement, and providing the supply voltage to a data sampling element connected to the voltage regulator, the data sampling element being a replica of the sampling element, the data sampling element sampling a stream of input data according to the sampling clock.

An apparatus for measuring a device current of a device under test (DUT) includes a first circuit including a first terminal for coupling to a first connection terminal of the DUT. The first circuit is configured to supply a first test voltage for the first terminal and to output a first output voltage sensed at the first terminal. The apparatus further includes a second circuit having a second terminal for coupling to a second connection terminal of the DUT. The second circuit is configured to supply a second test voltage for the second terminal and to output a second output voltage sensed at the second terminal. The apparatus further includes a third circuit configured to determine the device current of the DUT based on the first output voltage, the second output voltage, the first test voltage and the second test voltage. The first circuit and the second circuit are identical.

In an embodiment a method for testing a digital electronic circuit includes coupling an external test equipment to a digital electronic circuit in order to apply an external voltage signal to the digital electronic circuit when an automatic test pattern generation (ATPG) procedure with a given test pattern is performed, wherein a value of the external voltage signal is controlled by the external test equipment and measuring, at the external test equipment, the digital supply voltage at an output of the voltage regulator and at an input of the internal digital circuitry, wherein the external voltage signal is applied to the differential inputs of the op-amp voltage regulator through an adaptation circuit to obtain determined values of the digital supply voltage.

In an embodiment a method for testing a digital electronic circuit includes coupling an external test equipment to a digital electronic circuit in order to apply an external voltage signal to the digital electronic circuit when an automatic test pattern generation (ATPG) procedure with a given test pattern is performed, wherein a value of the external voltage signal is controlled by the external test equipment and measuring, at the external test equipment, the digital supply voltage at an output of the voltage regulator and at an input of the internal digital circuitry, wherein the external voltage signal is applied to the differential inputs of the op-amp voltage regulator through an adaptation circuit to obtain determined values of the digital supply voltage.

Circuits and methods for testing voltage monitor circuits are provided. In one embodiment, a method includes setting voltage monitor circuits to test mode; setting, a monitor reference in each voltage monitor circuit, to a respective targeted threshold voltage using a corresponding trim code; ramping, a voltage provided to a subset of voltage monitor circuits, from a first voltage to a second voltage using a test voltage supply, voltages between the first voltage and the second voltage corresponding with targeted threshold voltages of the subset of voltage monitor circuits; determining, for each voltage monitor circuit in the subset of voltage monitor circuits, a voltage value of the test voltage supply resulting in a change in a logic state at an output of a corresponding voltage monitor circuit.

A full load test system of an electrical power converter and the test method thereof is disclosed. The full load test method of the electrical power converter comprises the following steps: (a) providing a power converter under test (PCUT); (b) configuring the PCUT in/on a test circuit; (c) serially connecting the PCUT with at least one bidirectional power converter in the test circuit; (d) connecting the test circuit to an alternating current low voltage three-phase power source; and (e) performing a test of the PCUT under full-load condition.

Obtaining a periodic test signal, sampling the periodic test signal using a sampling element according to a sampling clock to generate a sampled periodic output, the sampling element operating according to a supply voltage provided by a voltage regulator, the voltage regulator providing the supply voltage according to a supply voltage control signal, comparing the sampled periodic output to the sampling clock to generate a clock-to-Q measurement indicative of a delay value associated with the generation of the sampled periodic output in response to the sampling clock, generating the supply voltage control signal based at least in part on an average of the clock-to-Q measurement, and providing the supply voltage to a data sampling element connected to the voltage regulator, the data sampling element being a replica of the sampling element, the data sampling element sampling a stream of input data according to the sampling clock.