A harmonic distortion separation method, nonlinear character determination method, apparatus and system where a phase difference between an inherent harmonic and a generated harmonic is determined by using multiple groups of input power, output power and fundamental magnitudes of a memoryless nonlinear transfer function of a nonlinear model of a system to be measured, and power of a harmonic generated by the system to be measured is separated by using the phase difference. In an embodiment, the phase difference between the inherent harmonic and the generated harmonic is first determined by using an assumption that a model coefficient is a constant according to the set nonlinear model, then the harmonic separation is performed by using the phase difference, and the power of the harmonic generated by the system to be measured is calculated.

The disclosure provides a method and apparatus of interleaved on-chip testing. The method merges a test setup for analog components with a test setup for digital components and then interleaves the execution of the digital components with the analog components. This provides concurrency via a unified mode of operation. The apparatus includes a system-on-chip test access port (SoC TAP) in communication with a memory test access port (MTAP). A built-in self-test (BIST) controller communicates with the MTAP, a physical layer, and a memory. A multiplexer is in communication with the memory and a phase locked loop (PLL) through an AND gate.

The disclosure provides a method and apparatus of interleaved on-chip testing. The method merges a test setup for analog components with a test setup for digital components and then interleaves the execution of the digital components with the analog components. This provides concurrency via a unified mode of operation. The apparatus includes a system-on-chip test access port (SoC TAP) in communication with a memory test access port (MTAP). A built-in self-test (BIST) controller communicates with the MTAP, a physical layer, and a memory. A multiplexer is in communication with the memory and a phase locked loop (PLL) through an AND gate.

An integrated circuit (IC) chip includes an on-chip analog signal monitoring circuit for monitoring a set of analog signals generated by one or more mixed signal cores within the IC chip, converting the analog signals into digital signals, storing the digital signals in an on-chip memory, and providing the digital signals to a test equipment upon request. The analog signal monitoring signal includes an on-chip reference generator for generating precise voltages and/or currents, a switching network for routing a selected reference signal to an analog-to-digital converter (ADC) for calibration purpose and for routing a selected analog signal from one of the mixed signal cores to the ADC for digitizing purposes. The IC chip further includes an on-chip memory for storing the digitized analog signals for subsequent accessing by a test equipment for analysis. The IC chip includes a digital analog test point (ATP) for outputting the digitized analog signals.

A safety mechanism device includes measuring whether a first output signal or results meets dynamically adjustable boundary criterion. The safety mechanism compares the first output signal with at least one boundary signal that is dynamically adjusted. The safety mechanism can produce a dynamically or automatically adjusted boundary signal using a second output signal. The second output signal can mimic the first output signal.

A test method is provided to test a semiconductor integrated circuit including an analog-to-digital converter and/or a digital-to-analog converter. An analog test signal having a test pattern is generated using an analog test signal generator or a digital test signal having the test pattern using a digital test signal generator. An analog output signal corresponding to the test pattern is generated by applying, as a digital input signal, the digital test signal having the test pattern to a digital-to-analog converter responsive to generation of the digital test signal. A digital output signal corresponding to the test pattern is generated by applying, as an analog input signal, the analog test signal having the test pattern or the analog output signal corresponding to the test pattern to an analog-to-digital converter. A normality of the semiconductor integrated circuit is determined based on the digital output signal corresponding to the test pattern.

A method for testing a signal path in a sensor, the signal path including a filter circuit and a comparator circuit, the method including: closing a first signal line that is arranged to bypass a first capacitor in the filter circuit; injecting a test signal into the signal path after the first signal line is closed; and detecting whether a signal that is output by the comparator circuit in response to the test signal satisfies a predetermined condition.

A method and system that enhances a service life of a battery is provided. The method includes values of a set of operational characteristics of a plurality of electrochemically active materials of at least one electrode of the battery. The set of operational characteristics include a voltage, a change in accumulated energy, a change in ohmic resistance, and a change in a rate of change in accumulated energy with respect to a rate of change in ohmic resistance. The values are compared with predefined values of the set of operational characteristics. A rate of depletion and a type of depletion of each of the plurality of electrochemically active materials are determined, and a range of the State of Charge, a range of the voltage, and a range of current to operate the battery for enhanced service life are determined.

A method and system that enhances a service life of a battery is provided. The method includes values of a set of operational characteristics of a plurality of electrochemically active materials of at least one electrode of the battery. The set of operational characteristics include a voltage, a change in accumulated energy, a change in ohmic resistance, and a change in a rate of change in accumulated energy with respect to a rate of change in ohmic resistance. The values are compared with predefined values of the set of operational characteristics. A rate of depletion and a type of depletion of each of the plurality of electrochemically active materials are determined, and a range of the State of Charge, a range of the voltage, and a range of current to operate the battery for enhanced service life are determined.

Device for checking the integrity of a digital transmission for an analog output of a system. The analog output may be checked for transient errors that can be attributed to a digital transmission path embedded somewhere within the vehicle system. A test signal is introduced into a digital transmission that can be reassembled from an analog path of the analog output, and, if not, allows the test device to pinpoint that errors are appearing due to the digital path, and not because of the analog output. In this way, debugging an installation of a system becomes easier; obtaining confidence in reliability of a mixed analog and digital system becomes less of a challenge and less time consuming.