Provided are a thin film transistor, a display device, and a thin film transistor manufacturing method, in which variation in characteristics is small. The present invention is provided with: a gate electrode formed on a substrate; a gate insulation film formed so as to cover the gate electrode; a semiconductor layer which is formed on the upper side of the gate insulation film and which includes a polysilicon layer disposed, in a plan view, inside a region defined by the gate electrode; an etching stopper layer disposed on the upper side of the polysilicon layer; and a source electrode and a drain electrode provided on the semiconductor layer so as to be separated from each other, wherein the polysilicon layer has first and second regions which are not covered with the etching stopper layer, and a part of the source electrode exists above the first region and a part of the drain electrode exists above the second region.

A first transistor, a second transistor, a third transistor, a fourth transistor are provided. In the first transistor, a first terminal is electrically connected to a first wiring; a second terminal is electrically connected to a gate terminal of the second transistor; a gate terminal is electrically connected to a fifth wiring. In the second transistor, a first terminal is electrically connected to a third wiring; a second terminal is electrically connected to a sixth wiring. In the third transistor, a first terminal is electrically connected to a second wiring; a second terminal is electrically connected to the gate terminal of the second transistor; a gate terminal is electrically connected to a fourth wiring. In the fourth transistor, a first terminal is electrically connected to the second wiring; a second terminal is electrically connected to the sixth wiring; a gate terminal is connected to the fourth wiring.

A method, apparatus, and system for protection from hazards of conductivity is disclosed using non-electrical means to disrupt electrical current with a thermovolumetric substance. The purpose of this invention is to prevent hazardous conditions from occurring by disrupting the flow of electrical current prior to the development of arc fault conditions.

A display device includes a lower substrate, a light emitting structure, a lower wire, an upper wire, an insulating layer, and a connection pattern. The light emitting structure is disposed in a display area on the lower substrate. The lower wire is disposed in a peripheral area on the lower substrate. The upper wire is disposed on the lower wire, and partially overlaps the lower wire. The insulating layer structure includes a first contact hole that exposes a first portion of the upper wire, which overlaps the lower wire, and a first portion of the lower wire, which is adjacent to a portion of the lower wire that overlaps the upper wire. The connection pattern is disposed on the insulating layer structure, the lower wire, and the upper wire, and electrically connects the upper wire to the lower wire through the first contact hole.

The present invention relates to a slot waveguide formed by a vertical material stack comprising a top layer with a first refractive index, a center layer including a ferroelectric material and with a second refractive index, and a Si.sub.1-xGe.sub.x pseudosubstrate layer with 0<x≤1 and with a third refractive index. The center layer is grown on the Si.sub.1-xGe.sub.x pseudosubstrate layer. The second refractive index is lower than the first refractive index and lower than the third refractive index. The slot waveguide can be included in a phase-shifter including two vertically arranged electrodes configured for providing a vertical electrical field (E) extending between the top layer and the bottom layer of the slot waveguide and for providing a complementary-metal-oxide-semiconductor compatible driver voltage. The phase-shifter can be configured for providing a linear electro-optical effect inside the center layer of the slot waveguide.

A display panel, a manufacturing method thereof and a display device are provided. The display panel includes a substrate and a plurality of active switches disposed on the substrate. The active switch includes a gate layer disposed on a bottom portion. The gate layer is wound with an insulation medium layer, and the insulation medium layer includes a light-obstructing layer disposed on a side portion of the gate layer.

A liquid crystal display device with a high aperture ratio is provided. A liquid crystal display device with low power consumption is provided. The display device includes a display portion and a driver circuit portion. The display portion includes a liquid crystal element, a first transistor, a scan line, and a signal line. The driver circuit portion includes a second transistor. The liquid crystal element includes a pixel electrode, a liquid crystal layer, and a common electrode. Each of the scan line and the signal line is electrically connected to the first transistor. The scan line and the signal line each include a metal layer. The structure of the first transistor is different from that of the second transistor. The first transistor is electrically connected to the pixel electrode. The first transistor includes a first region connected to the pixel electrode. The pixel electrode, the common electrode, and the first region have a function of transmitting visible light. Visible light passes through the first region and the liquid crystal element and is emitted to the outside of the display device.

A display device that is suitable for increasing its size is provided. The display device includes first to third wirings, a first transistor, first to third conductive layers, and a first pixel electrode; the first wiring extends in a first direction and intersects with the second and the third wirings; the second and the third wirings each extend in a second direction intersecting with the first direction; a gate of the first transistor is electrically connected to the first wiring; one of a source and a drain of the first transistor is electrically connected to the second wiring through the first to the third conductive layers; the second conductive layer includes a region overlapping with the third wiring; the first conductive layer, the third conductive layer, and the first pixel electrode contain the same material; the first wiring and the second conductive layer contain the same material; the first wiring is supplied with a selection signal; and the second and the third wirings are supplied with different signals.

To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.

A capacitive electro-optical modulator includes a silicon layer having a cavity having sidewalls and a floor. A germanium or silicon-germanium strip overlies the silicon layer within the cavity. A silicon strip overlies the germanium or silicon-germanium strip within the cavity. The silicon strip is wider than the germanium or silicon-germanium strip. An insulator fills the cavity laterally adjacent the germanium or silicon-germanium strip and the silicon strip and extending between the sidewalls of the cavity. An upper insulating layer overlies the silicon strip and the insulator. A layer of III-V material overlies the upper insulating layer. The layer of III-V material formed as a third strip is arranged facing the silicon strip and separated therefrom by a portion of the upper insulating layer.