Patent classifications
G03F1/42
PROCESSING SYSTEM, PROCESSING METHOD, MEASUREMENT APPARATUS, SUBSTRATE PROCESSING APPARATUS AND ARTICLE MANUFACTURING METHOD
The present invention provides a processing system that includes a first apparatus and a second apparatus, and processes a substrate, wherein the first apparatus includes a first measurement unit configured to detect a first structure and a second structure different from the first structure provided on the substrate, and measure a relative position between the first structure and the second structure, and the second apparatus includes an obtainment unit configured to obtain the relative position measured by the first measurement unit, a second measurement unit configured to detect the second structure and measure a position of the second structure, and a control unit configured to obtain a position of the first structure based on the relative position obtained by the obtainment unit and the position of the second structure measured by the second measurement unit.
Mask assembly and associated methods
A method comprising the steps of receiving a mask assembly comprising a mask and a removable EUV transparent pellicle held by a pellicle frame, removing the pellicle frame and EUV transparent pellicle from the mask, using an inspection tool to inspect the mask pattern on the mask, and subsequently attaching to the mask an EUV transparent pellicle held by a pellicle frame. The method may also comprise the following steps: after removing the pellicle frame and EUV transparent pellicle from the mask, attaching to the mask an alternative pellicle frame holding an alternative pellicle formed from a material which is substantially transparent to an inspection beam of the inspection tool; and after using an inspection tool to inspect the mask pattern on the mask, removing the alternative pellicle held by the alternative pellicle frame from the mask in order to attach to the mask the EUV transparent pellicle held by the pellicle frame.
Photomask for negative-tone development
A photomask for negative-tone development (NTD) includes a main region, and a scribe lane region surrounding the main region and including a first lane and a second lane. The first and the second lane is provided at first opposite sides of each other with respect to the main region. The first lane includes a first sub-lane extending in a first direction and a second sub-lane that extending in the first direction. The first sub-lane includes a first dummy pattern and the second sub-lane includes a second dummy pattern. The first dummy pattern and the second dummy pattern are configured to radiate light exceeding a threshold dose of light to a first portion of a negative-tone photoresist provided under the first lane of the photomask.
Photomask for negative-tone development
A photomask for negative-tone development (NTD) includes a main region, and a scribe lane region surrounding the main region and including a first lane and a second lane. The first and the second lane is provided at first opposite sides of each other with respect to the main region. The first lane includes a first sub-lane extending in a first direction and a second sub-lane that extending in the first direction. The first sub-lane includes a first dummy pattern and the second sub-lane includes a second dummy pattern. The first dummy pattern and the second dummy pattern are configured to radiate light exceeding a threshold dose of light to a first portion of a negative-tone photoresist provided under the first lane of the photomask.
PHOTOLITHOGRAPHY ALIGNMENT PROCESS FOR BONDED WAFERS
Various embodiments of the present disclosure are directed towards a semiconductor processing system including an overlay (OVL) shift measurement device. The OVL shift measurement device is configured to determine an OVL shift between a first wafer and a second wafer, where the second wafer overlies the first wafer. A photolithography device is configured to perform one or more photolithography processes on the second wafer. A controller is configured to perform an alignment process on the photolithography device according to the determined OVL shift. The photolithography device performs the one or more photolithography processes based on the OVL shift.
PHOTOLITHOGRAPHY ALIGNMENT PROCESS FOR BONDED WAFERS
Various embodiments of the present disclosure are directed towards a semiconductor processing system including an overlay (OVL) shift measurement device. The OVL shift measurement device is configured to determine an OVL shift between a first wafer and a second wafer, where the second wafer overlies the first wafer. A photolithography device is configured to perform one or more photolithography processes on the second wafer. A controller is configured to perform an alignment process on the photolithography device according to the determined OVL shift. The photolithography device performs the one or more photolithography processes based on the OVL shift.
Mask orientation
A method of forming patterned features on a substrate is provided. The method includes positioning a plurality of masks arranged in a mask layout over a substrate. The substrate is positioned in a first plane and the plurality of masks are positioned in a second plane, the plurality of masks in the mask layout have edges that each extend parallel to the first plane and parallel or perpendicular to an alignment feature on the substrate, the substrate includes a plurality of areas configured to be patterned by energy directed through the masks arranged in the mask layout. The method further includes directing energy towards the plurality of areas through the plurality of masks arranged in the mask layout over the substrate to form a plurality of patterned features in each of the plurality of areas.
Mask orientation
A method of forming patterned features on a substrate is provided. The method includes positioning a plurality of masks arranged in a mask layout over a substrate. The substrate is positioned in a first plane and the plurality of masks are positioned in a second plane, the plurality of masks in the mask layout have edges that each extend parallel to the first plane and parallel or perpendicular to an alignment feature on the substrate, the substrate includes a plurality of areas configured to be patterned by energy directed through the masks arranged in the mask layout. The method further includes directing energy towards the plurality of areas through the plurality of masks arranged in the mask layout over the substrate to form a plurality of patterned features in each of the plurality of areas.
Fabricating method of photomask, photomask structure thereof, and semiconductor manufacturing method using the same
A method for manufacturing a semiconductor includes: receiving a photomask substrate including a shielding layer; defining a chip region and a peripheral region adjacent to the chip region; forming a design pattern in the chip region; forming a reference pattern by emitting one first radiation shot and a beta pattern by emitting a plurality of second radiation shots in the peripheral region, wherein a pixel size of the first radiation shot is greater than a pixel size of the second radiation shot; comparing a reference roughness of a boundary of the reference pattern and a beta roughness of a boundary of the beta pattern; transferring the design pattern to the shielding layer if a difference between the reference roughness and the beta roughness is within a tolerance; and transferring the design pattern of the photomask to a semiconductor substrate.
Fabricating method of photomask, photomask structure thereof, and semiconductor manufacturing method using the same
A method for manufacturing a semiconductor includes: receiving a photomask substrate including a shielding layer; defining a chip region and a peripheral region adjacent to the chip region; forming a design pattern in the chip region; forming a reference pattern by emitting one first radiation shot and a beta pattern by emitting a plurality of second radiation shots in the peripheral region, wherein a pixel size of the first radiation shot is greater than a pixel size of the second radiation shot; comparing a reference roughness of a boundary of the reference pattern and a beta roughness of a boundary of the beta pattern; transferring the design pattern to the shielding layer if a difference between the reference roughness and the beta roughness is within a tolerance; and transferring the design pattern of the photomask to a semiconductor substrate.